A "priority" of the subroutine means anything in an FPGA?

Since a programmed FPGA is a logical collection material strung with potentially much of it at the same time, defining priority execution of FPGA subVIs to "subroutine" really nothing? If you read the description of what made a priority of the subroutine, it is said that he devoted all resources in a thread of execution of the code in the subroutine. For me, this means time sharing of resources. But I don't think that execution shared threads exist in an FPGA, or are they? All possible execution priority levels mean anything to the FPGA code?

Priorities of enforcement have no effect in the FPGA. Each Subvi not requiring arbitration (that is to say, is reentrant or used only once) is inline in the main VI at compile time. Execution priority, as far as I know, has no effect on arbitration for these subVIs that requires it.

Tags: NI Software

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