CPULL DPULL, I need some clarification

Hello community,

I have a question for CPULL and DPULL on my device has 6533 (DIO-32HS). I understand it, I can't control these pins using Labview and the way they are wired (top or bottom level deterrent the behavior of my open lines.)

I understand that correctly?

Thank you for a short notice if I'm right or wrong.

Florian

Problem has been resolved. The device is controlled by another DIO card, it's just happened that some channels I wanted control found on CPULL and DPULL. It gave me a headache to understand that the strings are not standardized, I just assumed that they where. I'll change my card tomorrow and everything should work.

Tags: NI Hardware

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