error-61141 open FPGA VI reference

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• Open FPGA reference FPGA VI

  I'm learning the FPGA.  I have a few simple question.

  1. I tried to use the open FPGA VI reference configuration.  I selected the file bit on my PC, and I checked the run option VI FPGA.  Why I select the bit file on my PC?  The file bit is not supposed to be on my FPGA target?

  2. once I open FPGA VI reference, I fed to an invoke node, but it won't.  It is said that the sources and sinks have given different type, but he also says that they are both FPGA interface.  I'm a bit confused.

  Please see attached picture.

  jyang72211 wrote:

  1. I tried to use the open FPGA VI reference configuration.  I selected the file bit on my PC, and I checked the run option VI FPGA.  Why I select the bit file on my PC?  The file bit is not supposed to be on my FPGA target?

  Not quite sure what you're asking here.  A FPGA target has no local storage.  When you open the FPGA VI reference, LabVIEW support the bitfile on the FPGA.  The VI that calls open FPGA VI reference is one that opens the bitfile, the bitfile must be local to this VI (in this case, on your PC).

  jyang72211 wrote:

  2. once I open FPGA VI reference, I fed to an invoke node, but it won't.  It is said that the sources and sinks have given different type, but he also says that they are both FPGA interface.  I'm a bit confused.

  The FPGA reference on the Panel before you must match the configuration of the reference that you're passing to it.  Right-click on the front panel control and configure the FPGA reference to point to the same bitfile you open.  Better than that, bind the FPGA VI reference open to a Type definition and the place that the category definition on the Panel the Subvi front.  Note that if you do this, it works at the back of what you would expect.  Update of the baseline open FPGA VI changes the type definition; you never directly change the type definition.

• Open FPGA references change to no. target when compiled with executable in time real start

  Hello again you useful forum fans!  I have a problem that I hope someone can give me a hand with.

  I have a project that has a Windows component and a component of the target in real time, that are running on a hypervisor type NI PXI-8110 system.  Communication both sides between them using shared variables.

  On the real-time side, I have four FPGA targets who are reading and writing various analog and discrete inputs and outputs.  I several periods loops which opens a reference to one of the FPGA targets during the first call, then pass this reference in several subVIs that read and write to panels prior to the FPGA.  The loops the FPGA reference thus made available and reuse it in the next iteration through the shift registers.  Each FPGA target has only a single reference open to him.  One of the loops is using the FPGA reference directly and does not pass it in any subVIs.

  It all works very well in the development environment, I can read and control inputs and outputs FPGAS via the front panel of the application of the side Windows.  It also works very well if I start the game real time in the development environment, and run the code of windows as a stand-alone executable file.

  However, when I compile the code in real-time in an executable startup and deploy it to the target, it does not work.  I enabled debugging on the executable, and when I connect to it via the operation-> debug executable in the menu, I see an arrow broken at execution.  Further investigation shows that each of the four open screw reference FPGA is now empty, the text under them is "no target" and the thread for reference on their part to my first Subvi is broken.  I need your help to understand how to operate as it does in the development environment.

  I followed the instructions of these two knowledge base articles to compile and download the bitfiles FPGA on the FPGA target and execute on start or restart:

  http://digital.NI.com/public.nsf/allkb/39795847AC67296D862575FB0046944F

  http://digital.NI.com/public.nsf/allkb/BC513C2A0DC29C89862574BF0002B0B9?OpenDocument

  Open FPGA reference screw are configured for the FPGA to build specifications that I created for each target in the LabVIEW FPGA project.

  I called technical support, NO phone, and yet were able to determine this one out, so additional "brownie" points if you do!  I would offer you the same no detailed screenshot that I have (I can't give more detailed code out because its owner, unfortunately), but apparently the forum doesn't like my image file, as I can't seem to load.

  Please let me know if you have any ideas regarding what is happening!  I appreciate it.

  Jon,

  I'm always up for the challenge.  Have you tryied recompile the FPGA VI that accesses the RT VI?  I also suggest to try and open the bitfile instead of the FPGA VI.  You run in dynamic mode (this is not a suggestion, it's just a question)? There is no difference if you try to open the FPGA VI reference outside the while loop, then past the reference to use inside the while loop without shift registers, then close the reference to the FPGA VI outside the while loop?

  Let me know if these suggestions makes no difference.

• FPGA VI reference number

  Hello guys,.

  I have a question/problem about the FPGA VI reference.

  My situation: I have the state machine on my system in real time, calling successively the different bitfiles. To break it down into two different bitfiles.

  In situation 1, I call a bitfile and I like to read analog values and I use I2C.

  In State 2, I call a bitfile, read the same as in State 1 and besides I do other stuff on the FPGA.

  Since I use a lot subVIs on my RT system, my FPGA references are related to type 2 different defs, so that I don't have to update the reference "FPGA VI" - indicators and orders by myself, if I use a slightly updated bitfile up-to-date version. But now, I have a problem, if I use the same Subvi 'read I2C' for bitfile 1 and 2, that it does not work, because controls of type def are different. If I linked the two bitfiles to the same type definition, I get a red dot of coercion to the Subvi of entry and read/write inside functions do not work.

  Does anyone have an idea? I don't want to copy the Subvi and exchange all indicators reference inside...

  Kind regards

  Slev1n

  Well, you can have both...

  You can perform a cast of dynamic type only if necessary (before your subVIs shared as I2C) and use the static references to the unrequited subVIs.

  You could use a typedef for the FPGA ref in your Subvi I2C (with only the common subset used in the Subvi) and use the typedef as the cast function.

• NET Framework 1.1 SP1 installation fails. Error code: 0x66A. 867460 reference

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  It downloads, but the installation fails.

  I have latest updates installed.

  See: http://social.answers.microsoft.com/Forums/en/vistawu/thread/0ffda4f1-4a9f-426a-94f4-4d6bd92ec2e2

  66A: he cannot find the files of origin or something of memory, setting is corrupted.

  You can simply fix Framework 1.1

  TaurArian [MVP] 2005-2011 - Update Services

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  Original title: error: CreateFile (C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp\~e5d141.tmp

  I'm getting this error when opening certain programs to work and now are not. I have studied this particular error and did not find a lot about it or how to fix it.

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  original title: config file error could not open the file column line 0 0

  onfig file error cannot open file row 0 column 0 - whenever I try to open my hp game console... I get this error message...

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  Was the HP works well before game console? If Yes, then do you remember any hardware/software changes, after which the problem started?

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  http://h30434.www3.HP.com/T5/desktop-operating-systems-and/BD-p/OSandSW

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