How to add a FIFO 128-bit DRAM to the FPGA project?

How can I add the DRAM FIFO - 128-bit memory Interface to an SMU-796XR RIO module?

Above project is examples of projects. I know how to add DRAM but not how to set as FIFO 128 bits as shown above.

Any guidance is appreciated.

Right-click on the FPGA target-> properties

Select Properties DRAM on the left side of the Popup.

Change the mode of the two shores to CLIP nested LabVIEW FPGA memories.

Click OK.

The project will be auto-updated with new DRAM memory, it will be empty.

Right-click on the DRAM-> properties

Enable

Select FIFO 128 bits

Tags: NI Software

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