How to manage the turnover in number of cycles of FPGA output?
I wrote a little VI that counts ticks on a set of lines of DI for a period of time. It uses the number of cycles of VI to determine how much time has passed since he started running. The output of this VI is a U32, and subtraction function looks like it going to saturate to '0' if the number of cycles longer rolls. How can I handle this situation to prevent the VI to leave earlier?
Integer arithmetic must manage calculation rolling correctly (for example if your value is a U8 and you do 3-250, you should get 9). I guess (although I never checked) it works even in the FPGA. You can do a simple check yourself with explicit code. It would be nothing less than a complete cycle of safe, so it depends how much time it takes. If it is ms, it would take about 50 days. In your case, it seems that you have configured the service to be in us, so it would be somewhere more than an hour. If that's not enough, then you can maintain the real value in a U64 and then take the number of us that passing in each iteration and that adds to the U64.
Tags: NI Software
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I want to know how can replace these newline within a column to a space.
If anyone has any ideas, please let me know.
Thank you very much in advance.
Ann
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:)
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