How to read the status of User1 DIP-switch with a cRIO FPGA chassis?

How to read the State of the DIP switches on a FPGA cRio chassis?

I work with a cRIO 9022... My idea is to put the system in "service" mode with USER1 switch to IT and communicate with the FPGA via the FPGA - GUI (VI) on the host computer instead via the RT module that is used in normal conditions.

Any ideas? Unfortunately, I don't have an unused channel on the left... .and (as I know) cannot use the interface RS232 of FPGA.

Many thanks in advance,

Luke

Hi, this is the correct information. You cannot read the FPGA of DIP-switch status. The only thing you could do is to use the function of Reading Switch.vi located under the range of functions-> real-> utilities RT time

It's how you probably know side host RT and not the FPGA.

Cordially Virginia

Tags: NI Hardware

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