Input analog FPGA and scale of output

Hello world

I'm looking at the code of the analog and exit entry in the example file. Why the signal at the analogue output is first divided by 10 and multiplied by 32768 and the signal at the entrance is first divided by 32768 and then multiplied by 10. Are there specific reasons for it? This is due to the internal structure of 7831R I use?

shuishen1983,

Who is scaling to HAVE it / AO on map R series FPGA. With these FPGA cards actually face GOT it / AO on a level of material such as you are reading/writing the actual values of the ADC. I mean, it's that your HAVE is 16-bit resolution over a +/-10V range. To get the voltage in your program, you will need to convert the readings of the ADC in significant values.

2 ^ 16 = 65536 (16-bit resolution = 65536 values, represents this 65536 - 10 v to 10 v)

Example entry:

Input to the FPGA card voltage is 5V, which will appear as 49152 on the ADC. To get significant value, follow the calculation below.

49152 (reading the raw ADC) - 32768 (account for negative numbers) = 16384 (I think the subtraction of 32768 is done in your FPGA to account for negative numbers, that the code is not attached, so I'm not sure)

16384 (value at the level of the ADC) / 32768 (input range) * 10 = 5V

Example of output:

You want to generate - 5V

-5 / 10 * = 16384 32768

-16384 + 32768 = 16384 (once again, i belive this negative conversion of the addition of 32768 is made directly in your FPGA code)

16384/65536 =.25

.25 * (10 - (-10)) = - 5 v (located between-10 v to 10 v, then convert it to a "full range" of the 20V)

I would like to know if this helps or not!

Tags: NI Software

Similar Questions

  • To input analog shutdown when the analog output is completed and synchronization

    Hello

    I'm trying to get my LabVIEW program to send analog output to a computer and read acceleration using the cDAQ-9184. Chassis output that I use is the NI 9263 and the chassis of entry is the NI 9234. I generate a signal of white noise using LabVIEW Express signal generator.

    The first problem I have is the synchronization. I had an old VI that has begun to measure the acceleration just about a second after the entry has been given to the machine. I used the LabVIEW tutorial on how to sync the analog input and output, only to discover that it does not work with two different hunts. Then I found another tutorial that shows how to synchronize different frames between them.

    The second problem is the cessation of the LabVIEW program. What I want to do is to generate the signal and then simultaneously send and read the input and output analog, respectively. It is because I don't want a phase difference or any shorter signal for a direct comparison. But as soon as the signal is sent to the machine, I want the entry to stop analog playback and then then the LabVIEW program must stop. I want to be able to choose any length of signal to be generated and stop as soon as the entire duration of the signal has been sent to the machine.

    I tried 'DAQmx stop', "DAQmx Timer" and 'DAQmx's task made?' and none of them have worked for me. It is also my first time on a forum posting, so I hope I gave enough information. I enclose my VI as well. The VI shows I read an entry for the analog input voltage, but I am only using this to try to get to the work programme.

    I'd appreciate any help I could get.

    Thanks in advance

    Peter

    Hi Peter,.

    I have some recommendations for you that I think you will get closer to your solution. First of all, I assumed you meant that you had 1 chassis (cDAQ-9184) who had two modules in it (NOR-9263 and NOR-9234). My next steps are based on this assumption, so if it's wrong, please let me know.

    For your first question about the synchronization, the code you provided is very close to what you need. You need to do, however, implement architecture master/slave for startup tasks DAQmx functions. To do this, you can add another frame to the flat sequence structure and put the master start task (input voltage) after the start slave (output voltage) task.

    To manage your second question and that the program ends at the point where you, the first step is to get rid of all the logic that you use with the local variable of length of time. Rather than use this logic, just wire the node "task performed?" of "is task performed?" operate to stop the loop. This will cause your loop to stop as soon as the signal is sent to the machine.

    I have some other recommendations for you that will increase the performance of your program:

    (1) rather than writing on file inside the last loop, you can use the DAQmx Configure Logging (PDM) .vi. You will place this VI between DAQmx Timing.vi and DAQmx Start Task.vi to the task of the analog input voltage.

    (2) after the last while loop, you want to stop the task and analog outputs as well with another DAQmx stop Task.vi.

    (3) rather than using a local variable for the entrance of displacement and wiring it in the DAQmx Write.vi, you can wire directly from the output waveform of the wave to build function node.

    That should help you get started in the synchronization of these tasks.

    -Alex C.

    Technical sales engineer

    National Instruments

  • Toggle the analog inputs and tasks of output on the same card in LabView

    Hello

    I'm relatively new to LabView and am trying to find the best way to switch between reading and writing tasks on my PCI-6024E. It seems this would be a common thing to do, but I found no good documentation or any relatable example program. Basically, I would like to be able to monitor certain analog inputs and then write that some outputs if an entry is in accordance with certain specific conditions (say > 4 Volts voltage). It is my understanding that you can only signal (input and output) types associated within a single task in DAQmx. I also understand that you cannot have multiple tasks running at the same time on the same material/map, otherwise you get a: 50103 error 'The specified resource is reserved. Calendar is not really all that matters to me, but quite synchronous and effective would be nice.

    I have attached a sample program that shows more or less what I'm trying to do. I want to follow several analog input lines (AI0 AI1, AI2 and AI3 and) effectively at the same time. If certain conditions are met, AI3 > 4 Volts, then write 5 Volts for analog AO0 and AO1 outings. I also want to maintain output at 5 Volts up to AI3 falls below 4 Volts. Is there a better way to pass the task to read and write than what I've done here? In a sense, all I really do is toggle of a state machine if the required conditions are met and if start/stop tasks of reading/writing necessary.

    One last question, is there a way to display the four channels in the waveform graph using the 1 d NChan 1Samp mode so I can have a time chart and indicators?

    P.S. I'm under LabView 2011 on Windows 7. Your ideas and suggestions are appreciated.

    Thank you

    KJ

    I also understand that you cannot have multiple tasks running at the same time on the same material/map, otherwise you get a: 50103 error 'The specified resource is reserved.

    This is incorrect.  You can't have two tasks of the same type running on a single card.  You can have an analog input and analog output task running simultaneously on the same hardware.

    You are right that each task can have only one type of task (entry or exit).  Discover DAQmx examples in the example Finder to get examples of synchronized input and output.

    PRO TIP: In the Finder of the example, go to the drop-down list in the lower left corner.  Pull down and select Add Hardware.  In the pop-up window, add your PCI-6024E to the right pane.  Click OK in this window.  Then in the main window of Finder example select your hardware from the drop-down list and check the filter results by the hardware.  The example Finder then only you will show examples that are out-of-the-box compatible with your hardware.  I am sure you can find something to fit your needs here.

  • Helps with 7852R input analog voltage measurement

    Hello

    I'm trying to measure three signals of tension off a QPD, the three signals are connected to the IA the SCB - 68 and then I used the example of vi to acquire analog inputs with FPGA R in the finder of the example. However, I make a range of very large numbers. I don't know how to convert these volts or what are these numbers, units... etc.

    Any help with this, please?

    Thank you

    Hi Biochemist_MU

    Please take a look at the forum post FPGA of analog input and output scale.  It deals with the scaling of the R-series cards.

    Hope this helps and let us know if you have any other questions.

  • FPGA and digital i/o Modules

    Hi all

    We have NI 9421 digital input and digital output NI 9472 Modules. We can run these modules into a VI under the 9073 cRIO chassis. While we have added the FPGA target under the same chassis, we cannot use the modules. We also install the scan engine.

    How can we use FPGAS and i/o Modules at the same time?

    Once you add a target FPGA in CompactRIO chassis, when you deploy the code, the cRIO is configured for the FPGA mode, which requires a bitfile compiled to connect with the C Series modules.  Remove the target FPGA or changing the mode of chassis in the project and by redeploying must reconfigure the cRIO for scan Mode, which allows you to use the IO module directly from the RT VI.

    For more information, see this post.

  • Input analog does not

    Recently, I was unable to read an analog signal. I use a TBX-68 block attached to a card PCI-MIO-16XE-50.  The signal will be max to everything I put the maximum voltage reading when I hang anything to her.  It will read zero volts with noise when the wires are not connected to anything and it will read somewhere around 6 + / 2 volts when two wires are connected to each other, far away from the 0 volt I expect.  I tried to replace the Board with another PCI-MIO-16XE-50 without success.  I connected the wires to the different analog inputs too.  I know that its reading of the entries that I hung up because it will react to what I do only for the entries that I've specified (is it is connected to AI 1 and I connect a battery to 2, playback is not affected).  Digital and analog outputs are working properly.

    Recently I am gone in DAQ Express changed some things for me to specify my front channels, but it does not work when I create a new too.  Could I have definitely changed the DAQ Express?  He was working before I messed up with this stuff, but it can also work after.  I don't me remember the last time it worked however when I opened first the front of an Express DAQ.

    I have attached a VI just that I expect to read the voltage input (even with nothing plugged, it's the reading-10 volts).

    Hey, pagoda.

    Looks like you may be in differential configuration and cannot be biasing the input rows. Differential configuration, the two lines of entry of a channel must receive ground somehow bias; It may be through enormous resistance, but something to attach the tension to keep them from floating away. Connect the + and - lines together is not enough, because that does not provide a path to Earth.

    Try to connect both + and - directly to the analog ground and see if you read a quiet 0 V. If it works, then connect the inputs to everything you want to measure. As long as both + and - has a way of DC grounded, however diverted, everything should work fine.

    Normally, if your source is floating, you'll want to link the - entry to your device and the mass also directly to analog. If your source is connected, you should not connect - ground, since it is probably already connected.

    Hope this helps,

    EBL

  • What is the use of FPGAS and how it differs from the IO Modules

    Hi all

    Maybe it's a silly question for most of you.  But I have very less knowledge about the basic concepts of electronic (FPGA, real-time) to cRIOs. I know that FPGA

    can be used to generate circuits within the chip that helps by some logical functions.

    I've just started working in the cRIO.  My question is that we have Modules e/s making it outputs all the application entry.  So, what is the purpose of e/s in the FPGA.

    Lets consider that we entered for an application of RTD.  In this case the module NI 9217 itself exits 24 bits of data from the RTD measurement which may be the process of the LabVIEW VI.  What will be this FPGA between the i/o Modules and the processor will help in?  Also I want to know what type of communication is used to send data between the FPGA and host modules.

    Thanks in advance

    Ajay HI:

    Sorry, you do not have an answer to your original question. However, you are right about the benefits of the FPGA. You said, if you build pre-processing in the FPGA, you can unload a lot of potentially CPU calculations out of the host processor. In addition, the program running on the FPGA is highly deterministic and can run the code very quickly. So if you build a kind of guard or evanescent dog part of your application, the FPGA is a good place to put it.

    To answer your other questions, communication between the modules and the FPGA is generally above the SPI and the data can be transferred between the FPGA and host via DMA FIFO operating on the PCI bus or single point save access using read/write in the FPGA host Interface controls. You can also use interruptions in signal of disputes between the FPGA host.

    I hope this helps, but let us know if you have any other questions.

  • Number of DMA FIFO of items to read mismatch in the FPGA and RT

    Hi all

    I use myRIO, LV14 to run my application.

    Request: I have to continuously acquire data via FPGA and host RT process once every 2000 samples are taken. I use DMA FIFO (size 8191) to acquire data, use timeout property in the FPGA to eliminate the buffer overflow. I had followed cRIOdevguide to implement this part. An excerpt of what I put in place is attached. All code runs in the SCTL at 50 MHz.

    Question: Two or three times I met with this strange behavior, the FPGA FIFO gives continous timeout and the RT is unable to read the FIFO. The number of elements to set the property in the FPGA VI gives 0 showing that FIFO is full and no more can be written, but the RT, remaining items gives 0, so it is reading 0 (none) elements.

    Solution: I put a case where I'll write to FIFO (under the code) and if the number of elements to write is different from zero. It seems to work fine, from now.

    What confuses me, is that my FPGA VI said that FIFO is full (number of items to write 0 = FIFO) and gives a timeout error, but RT VI said that number of items remaining in the FIFO is 0 and therefore no data is read. No idea why this is so? My RT and FPGA VIs continues to run, but with no gains or to read data.

    A few minutes after you run the code, I've seen this behavior. No idea why this happens? I try to reproduce the behavior, and will update if I meet with her again. Sorry, I can't post my code here, but I guess the code snippets to explain some extend.

    Thank you

    Arya

    Edit: Even with the mentioned workaround solution, the problem persists, now that the FPGA written any of FIFO. And the RT VI is not able to read all the elements he sees 0 items in the FIFO. The FIFO continues to be in a State of timeout. So I guess that the problem is on the side of RT.

    Why it looks like you read from the FIFO even in two different places in the same VI, at the same time? If the lower reading throws the FIFO, it will never trigger the reset, which could lead to the situation you describe, I think (it's hard to tell from a few screenshots).

    Also, your logic seems too complicated. I immediately noticed that there is no reason to select the entry, the output of = 0 - simply use the 'equal to zero' output directly. On the side of FPGA, why you need check the number of items that you want to write? There's nothing wrong with writing in a FIFO that is already full. just the data won't get written.

  • It is current on the analog module USB NI 9263 output voltage limit (+/-10 v)?

    It is current on the analog module USB NI 9263 output voltage limit (+/-10 v)? I try to run a current controlled resistance, but cannot get the required current. The servovalved has a parallel internal resistance of 80 ohms and requires 20 my full operation. Ohm's law: (.02 A) * ((80*80) /(80+80) ohms = 4.5 v) Yet, the required voltage, do not move the servo. Outside the material error (continue this by other means), what could be the problem?

    Have you checked the Manual?

    Page 12 1 says my.

    For servo, you really need some kind of amplifier.  See if the manufacturer provides the electronic driver for it.

  • is there a way to create a single video file of two separate video and have their output to two separate projectors?

    I started using the first less than two months ago and my tech video background is rather limited . I'm doing an art project where I am projecting two different projections on a large wall that are designed to be in harmony and interact with each other.   I intend to use two laptops, one for each projector.  This is a possible problem.  The docents Gallery in this gallery of the University will have to turn everything on every morning, having to click on both computers at the same time to synchronize the images play together perfectly.  That simple I'd like to think, I know year 19 former students who are the docents sometimes fail to grasp what is obvious.  Is there a way to take two project files and create a single file that could play for two projectors from a laptop outside?  As a split screen monitors?  That way they click on a button. I don't know if it's possible, it can't be.  I just thought to deal with this problem as possible before that happens.   

    Has ny advice would be greatly appreciated.

    You can create a sequence on the front which is double width. For example, 1280 x 720 (720 p) becomes 2560 x 720, which is TWO 720 p side by side videos in a clip. For reading, you may be able to implement the graphics card settings to do it for you, or - get a Matrox DualHead2Go box. You must set the graphics card in your computer to the display size double width, such as 2560 x 720, and the single output of the computer goes in the DH2G unit, which separates the entry into two outputs independent of 1280 x 720.

    There are many models available, depending on whether you are working analog or digital graphics card. There is a ton of information available, including tools for configuration and testers to run on your system. It is important to seek and choose carefully, to make sure that the connections are compatible and that map display of your computer (and Matrox unit) will support both the specific resolution you are looking for.

    Matrox DualHead2Go Digital SE | Multiple monitors for laptop computers

    Thank you

    Jeff Pulera

    Safe Harbor computers

    www.sharbor.com

  • Validation of the numerical value of precision and scale

    Hi all

    IAM using ADF with EJB.
    I have an inputText field that accepts numeric values (of type java.lang.Double). Due to data constraints, I want to validate the input on its accuracy and scale value.
    I put a label of f: convertNumber under the inputText and set the MaxIntegerDigits and MaxFractionDigits properties with the values you want.
    I also set the ApplyValidation of the attribute in the file pagedef property. However, no validation has worked.
    I did the same test with af:ConvertNumber without result too.

    I know it's easy to put these constraints at the level of the entities with BC4J.

    Is there a neat way to set validation or I need to write code in the bean to support?

    How about using a regular expression validator:
    http://blogs.Oracle.com/Shay/2007/12/regular_expression_validation.html

  • Qosmio G30-126: how simultaneously connect analog TV and TV satellite

    Hi, I have a Qosmio G30-126 and you have a problem with receiving simultaneous TV analog (by TV-in the port of integrated TV tuner) and satellite satellite set - top box (by AV-in ports).

    I can't program Windows Media Center for analog TV (but not satellite STB) per port, TV antenna and it works perfectly.
    I can't program Windows Media Center for digital satellite STB (but no TV analog) channels by AV-in port and it works perfectly.
    But I can't program Windows Media Center for the two TV analog I satellite STB, because during programming WMC forces me to choose between analog satellite or cable or SATELLITE box and does not allow me to choose two signal sources.

    For me, it's a big problem, because I have cable (analog) TV and satellite STB with digital channels. And I want to watch all the channels on my Qosmio.
    Could someone help me?

    >... because during the WMC program forces me to choose between analog satellite or cable or SATELLITE box and does not allow me to choose two signal sources.
    I think that in this statement you answered your question. I got Qosmio G30 a long time ago, and I also know that WMC can't handle with two sources of signals at the same time.
    To confirm that contact Microsoft and ask them. I mean that they have designed WMC and know how it works exactly.

    Toshiba has to provide suitable equipment (TV tuner) to provide the TV option on this laptop.

  • Qosmio F10: AV input is black and white

    Hello, you have a problem with my F10.

    Recently I had a problem with my laptop where it started with bars on the screen. Envoy that he took off for repairs, and she came back with a note saying that the motherboard has been replaced. Since his come back, my AV input is black and white and not aligned correctly on the screen. No way to fix this?

    [And as one thing aside, the remote doesn't work nor more; the computer recognizes it plugged but the buttons don't do anything!]

    Any help would be greatly appreciated!

    Hello

    I suggest to update version 1.0.2.0 TV tuner driver.
    Perhaps the reason is a bad driver installed.

    Good bye

  • How to use the target FPGA and co. on the same chassis cRIO?

    I have a cRIO system consisting of a master chassis 9074 with several modules IO and EtherCAT 9144 slave unit.

    I want to run a CIE (see: http://zone.ni.com/devzone/cda/epd/p/id/5333) on the chassis of the master, this uses the analytical engine. At the same time I have to do some very urgent measures if I want to use the Board in hybrid mode, using analysis and FPGA engine at the same time (as described here: http://digital.ni.com/public.nsf/allkb/0DB7FEF37C26AF85862575C400531690.)

    But as soon as I add the FPGA target at one of the chassis, the feature of the ice on this chassis stops working. After some research, I found that the CIE can initialize is no longer the modules belonging to the frame that has the target FPGA on it. Error in the method Init of the CIE is: 65700 (indeterminate). This occurs when you try to use "for a more specific class' on the modules configured with a target FPGA on it.

    Someone knows what can cause exactly this problem and perhaps provide a solution/work around?

    Many thanks in advance.

    Hybrid mode requires you to have a bitfile compiled running on the FPGA to be able to read the Scan Interface IO Variables.  Move the target FPGA at the RT target module will allow Interface of scanning for this module, but the frame will always mode Interface of LabVIEW FPGA.

    To get fair access to the scan mode for the frame, right click on the chassis in the project, and choose Properties.  Then, modify the Scan Interface programming.  If you want to continue using the programming of FPGA and the Scan Interface set (hybrid mode), you will need to compile a bitfile (empty if you do not want programs on the FPGA again or containing your FPGA code).  By compiling, the support of the module scan mode for the modules under your RT chassis is compiled in your custom bitfile.  Then, on your VI RT, you need to use reference FPGA VI open to your newly compiled VI.  Once this VI is deployed and ongoing implementation, you get the data from you are the CIE.

    For more information, see this knowledge base article and Reference Interface of Scan CompactRIO and procedures.

  • LabVIEW FPGA and real-time communication module

    Hi all

    I created a small program in labview FPGA which gets continually distance from the HC - SR04 ultrasonic sensor. The rest of the robot program is written in the time module real Labview. Is it possible that the distance calculated by FPGA module to read in time real module.

    I used the FPGA just because there micro-deuxieme counter, which helps me get the distance from the ultrasonic sensor.

    Thanks in advance.

    There are many ways this can be done, according to your needs.

    See the help article transfer of data between the FPGA and host (Module FPGA) for a breakdown of each method.

Maybe you are looking for

  • No button disable in don't plug ins display why?

    I have no buttons in the plug ins screen firefox 27other tha button to activate always, but even in this case when I click on that it doesn't do anything.I just installed quick time and that as all the available buttons, but no other plug in doesn't

  • OfficeJet 6500 has more: do not print officejet 6500 has more

    Hello. Status: Cannot print print, web pages in eith B & W or color.  I have updated driver SW, paper, ink, connectivity, computer restarted after SW update, printer reset after SW update. Detail: I am able to print the test page of the HP utility wi

  • How can I remove the sound icon on my screen startup.

    When I start my computer the big blue acoustic Panel covers the Middle at the bottom of my screen. I can prevent it from appearing. I needn't show her since I use the sound on the bottom right icon in the toolbar. I can't click on anything anyone beh

  • Smartphone BlackBerry 8700 c Device Manager and does not AT ALL

    So, I recently got a Blackberry 8700 c and for some reason, the Device Manager does not work. As my computer will make a dadunk noise when I connect my Blackberry via USB cable, but it doesn't register that my blackberry is connected. I can not go on

  • my computer slows down and play music disturb when I open multiple windows

    I wiped recently my laptop and since then, I've run all the programs that I did before, but when I open other windows when the music plays my computer everything slows down and disrupts the music. Any ideas would be great