Master Timebase and reference clock sharing

Similar Questions

• Reference clock synchronization and clock of sampling (not LabView but Daqmx, Sync and C)

  Well, I found an example that resemble what I wanted... in LabView: http://zone.ni.com/devzone/cda/tut/p/id/9308

  Now the question is all about timing of the timestamps and sample:

  Here is a list of ficelleStringString ficelleT of what I called...

  1. DAQmxCreateTask

  2. DAQmxCreateAIVoltageChan

  3. DAQmxSetRefClkSrc (used NISYNC_VAL_CLK10 = "PXI_CLK10")

  4. DAQmxRegisterEveryNSamplesEvent

  5. niSync_init (used a PXI-6682)

  6. niSync_SetAttributeViInt32 (used Terminal = NISYNC_VAL_PXISTAR0 and NISYNC_ATTR_1588_TIMESTAMP_BUF_SIZE = 3000)

  7. niSync_CreateClock (used Terminal = NISYNC_VAL_PXISTAR0)

  8. niSync_EnableTimeStampTrigger (used Terminal = NISYNC_VAL_PXISTAR0)

  Now this list makes me able to create a timestamp every time the clock triggers a RISING edge...

  Now how to synchronize these timestamps are useful for my sample? (I mean I need to sync my calendar with the PXI_CLK10 card) because for now prices will not match the sample rate.

  ALSO... a little weird...

  some of my cards will accept DAQmxSetRefClkSrc but others must use DAQmxSetMasterTimebaseSrc.

  Now I can't use DAQmxSetMasterTimebaseSrc with PXI_CLK10... no idea why...

  So, how did I would synchronize THESE cards...

  Alright I could totally be wrogn with my approach, but I'm new with stuff of OR and using C isn't exactly the best documented piece of the NC.

  Thanks in advance,

  SEB

  Thus,.

  We have the same clock sampling for all of these devices, but we are not PLL'ing with the card of the S series, we cannot guarantee that they will all be in phase.  However, given that all of these devices would be based on the same reference clock, we would not drift when we started the task.  Would this work?

  An alternative is to use the new X-Series card, which can also do a simultaneous sampling, but I don't know if it is feesible within your application.

• How global master pages changes and reference...?

  Here is my scenario, I have several technical documents (books) who are between 40 and 90 chapters.  I need to make overall on the master pages overrides and reference (logos, etc).  How can I change the master pages in the book without having to change each chapter separately master/reference page?

  I was not the creator of these books, and I'm fairly new to framemaker.  I have a lot of experience in Indesign and Pagemaker.

  The original documents were created in version 8.0 and I use version 9.0

  Thanks for the help-

  Rob

  [email protected]

  Either get a chapter just as you want, or create a master (recommended) file, is not in any book, but who has all the settings properly.

  Open your file of "master".

  Open all the files in the book (Shift + file > open). In the book file, select all the files of the component to which you want to apply the changes. Do file > import Formats > and specify your master file as source.

  If you only want to update the master and ref pages, simply select these options (template =) layouts.

  In most cases, you do not want to activate the checkboxes that remove the replacements.

  Art

• How to create the new page in the master page and make reference to the reference text framework previous page id?

  I have problem to apply/create an element of the master page and how to run the previos page text block to create the page text

  InterfacePtr<IPageSetupPrefs> iPageSetupPrefs (,static_cast<IPageSetupPrefs * > (:QueryPreferences() IID_IPAGEPREFERENCES, docRef)));

  if (iPageSetupPrefs is nil) {

  Assert (iPageSetupPrefs);

    break

  }

  InterfacePtr<ICommand> iNewPageCmd (CmdUtils:kNewPageCmdBossCreateCommand());

  if (iNewPageCmd is nil) {

  Assert (iNewPageCmd);

    break

  }

  InterfacePtr<IApplyMasterCmdData> iApplyMasterCmdData (iNewPageCmd, IID_IAPPLYMASTERCMDDATA );

  if (iApplyMasterCmdData is nil) {

  Assert (iPageCmdData);

    break

  }

  InterfacePtr<IPageCmdData> iPageCmdData (iNewPageCmd,UseDefaultIID());

  if (iPageCmdData is nil) {

  Assert (iPageCmdData);

    break

  }

  Int32 numPagesToInsert = 1;

  PMRect pageSizeRect = iPageSetupPrefs->GetPageSizePref();

  Int32 pos = iPageCmdData->GetNewPageInsertPosition();

  ISpreadGeometry InterfacePtr<IGeometry> (spreadList->QueryNthSpread(0));

  if (iSpreadGeometry is nil) {

  Assert (iSpreadGeometry);

    break

  }

  spreadUIDRef =:GetUIDRef(iSpreadGeometry);

  PMRect dfltPMRectPageSize = iPageSetupPrefs->GetPageSizePref();

  PMReal pageWidth is dfltPMRectPageSize. Right () - dfltPMRectPageSize. Left ();

  PMReal pageHeight is dfltPMRectPageSize. Bottom () - dfltPMRectPageSize. Back to top ();

  PMRect usrDefPMRectPageSize (0, 0, pageWidth, pageHeight);

  K2Vector< PMRect> pageBoundingBoxes;

  for ( int32 i = 0; i < numPagesToInsert; ++ i) {

  pageBoundingBoxes. push_back (usrDefPMRectPageSize);

  }

  iPageCmdData->SetNewPageCmdData(spreadUIDRef, numPagesToInsert, pos +1, & pageBoundingBoxes, nil);

  / / CreateSpreadFromSpread (docRef, spreadUIDRef);

  InterfacePtr<IBoolData> iBoolData (iNewPageCmd,UseDefaultIID());

  if (iBoolData is nil) {

  Assert (iBoolData);

    break

  }

  bool16 allowShuffle;

  if (this->GetShufflePref(allowShuffle, docRef) iskFailure) {

    break

  }

  iBoolData->Set(allowShuffle);

  CmdUtils:ProcessCommand(iNewPageCmd);

  Above code, able to create a page but the problem in applied master page?

  Using document Pages face?

  I think that your posToInsertAt for IPageCmdData::Set is incorrect.

  If the doc does not have facing Pages, posToInsertAt = 1;

  If doc is facing Pages and page insertion is the left-hand Page, posToInsertAt = 2;

  If doc is facing Pages and insert page is the right Page, posToInsertAt = 1;

  posToInsertAt = spread-> GetNumPages();

  newDocCmd and newDocCmdData are not used, you can delete these.

• CAN grasp the material master Timebase rate returns an error with new hardware OR XNET

  Hi all

  I have a project that communicates on a CAN bus. It has always worked well with a PCI-CAN/2 card, but when I tried to use it in combination with an NI PCI-8512 (NOR-XNET) newly purchased card, it returns the following error:

  "1074388560 error has occurred CAN set material master Timebase Rate.vi

  NI-CAN: (Hex0xBFF621B0) the specified feature has a drawing or model under the NI_CAN which can be made compatible with the hardware, NI - XNET CAN. »

  Yes, I have installed the NOR-XNET for NI-CAN compatibility library.

  The error occurs during the initialization of the RTSI connections for synchronization, that VI is attached.

  I guess that this code is based on an example found in LabView.

  When I remove the BOX: block Set (material master time base rate) property, there is no error and the rest of the application seems to work very well.

  Can someone explain what is / was some timebase setting the internal clock of 10 MHz before connecting a RTSI line for her?

  Are there side effects caused by the elimination of this step?

  Should I still include if I run the application in combination with the old card PCI-CAN/2?

  Thanks in advance.

  Hello Pianne,

  Based on our discussion in class, it seems indeed as part of your existing code is written in a very specific way which is not entirely compatible with the XNET approach.

  Indeed, it would be useful to have 2 separate versions of this init VI (and other CAN-code) of your code and allow you to decide which one to run your top-level application, depending on the setting used.
  A HAL as approach could still be used in this case.

• How to get the reference clock 10 MHz off PCI-5922

  Hello

  I'm evaluating PCI-5922 for the my request.

  In my application, PCI-5922 will get agilent signal 33250 function generator and the two instruments will be triggered at the same time with the same trigger signal.

  Is it possible to get out of the clock reference (10 MHz) off PCI-5922? If possible, the synchronization may be easier.

  I expect to get answers of experts!

  Zeehoon

  Hi Zeehoon,

  Before send you the unit for repair, please try one more thing.  The reference clock will be released not in fact until the task or acquisition is started or has committed at least.  Try to add a NO-SCOPE function commit after the property node where you set the reference clock output.

  Jennifer O.

• export a sample or reference clock in c#

  Hello

  I'm looking for a way to export the clock reference for a particular device or the sample clock for a particular task to one of the PFI lines on my device in the series Mr. I'm programming in c#. I've seen methods such as

  DAQmxConnectTerms

  and

  DAQmxExportSignal

  for the C API, but no corresponding method for c#. According to the manual of the m-series 6259, I should be able to export at least a sample of a PFI line clock, if not the actual reference clock. Thank you.

  -Jon

  Jon,

  After a little more research, I found a method that might be even better for your application.  In the DaqSystem class, it has a method called "ConnectTerminals" that allows you to specify signals to connect together.  The syntax will look similar to this:

  DaqSystem.Local.ConnectTerminals ("/ Ctr0InternalOutput/Dev1", "/ Dev1/PFI1");

  You can find the documentation on it in Explorer of objects under NationalInstruments.Daqmx.DaqSystem.  Let me know how it might work for you.

  Kind regards

  Joe S.

• GPS sync and external clock

  Hello everyone,

  my task is to synchronize my PXI system to the time base GPS and after using an atomic clock (10 MHz output signal) as well as external CLK in. after the first synchronization of the GPS. the GPS signal is no longer available, however very important as the base unit of time not significantly drift. For the material there is a PXI chassis with 6682H module for GPS reception and 5622/5603-5653 combination for the acquisition of measurement data available.

  I thought since I'm fairly new to Labview and PXI system, it would be nice if someone could give me some feedback on the solution and help solve the problems that I have.

  The idea would be to have atomic clock connected to all CLK INs the PXI at all times. For GPS sync I would use the "Set time reference niSync' function first set the clock of Council to the GPS. After the free trial (the device is not moved during the GPS synchronization) I would like to stop using the GPS.

  After the external atomic clock. should also be used to calculate the frequency increases and the determination of the relative time. I suppose that if I back the reference to free running time, it would still use the last increments of calculated frequency derived from GPS?

  Is there another solution to address both reference to PPS? Problem is, I only have a 10 MHz signal available.

  Thanks a lot for any help

  Hello.

  When the PXI-6682 tries to synchronize to a source (GPS, 1588, PPS), she is a great fit for its time base, to eliminate the first offset from the source and then made small developed to the clock, the timekeeper, to keep in sync with the source of the conduct.

  In this case, you have an atomic source at 10 MHz that you trust, so you do not want/need small adjustments, you want to only make the initial adjustment of wholesale and then just run based on the clock of 10 MHz supplied.

  Is there a way to make the PXI-6682 to do this.  You will need to configure it to assume that PXI_CLK10 is good and no adjustment is necessary. There is no call to the Sync API OR standard to do this, you need to get the VI that configures the jury to do this in the .llb used to clock discipline (in which the PXI-6682 also doesn't make small adjustments based on his time, but guess PXI_Clk10 is 'good').

  You can get the .llb from here: http://joule.ni.com/nidu/cds/view/p/id/2318/lang/en

  The VI you need is mdevClkDisc.llb\_clkDisc_niSync_advancedAttribute_set_bool.vi

  Together the "attribute of niSync" entry "Clk10 disciplining activated ' and the 'value' of coming true, as shown in the picture as an attachment.  The time reference offset must be<10ns and="" constant. ="" give="" that="" a="" try="" and="" let="" us="" know="" how="" it="">

  Note that once you do this, the PXI-6682 will be able to make adjustments to his timekeeper. It will work exclusively on the 10 supplied MHz reference clock. Therefore, if the clock of 10 MHz in fact derive from GPS, there is nothing that the 6682 can do about it.  If you fall into this situation, one thing you can do is set at a time reference to free running, set the time to something that is off by saying that 60 seconds, and then set the time reference to the GPS.  That should put it back on the rails.

  I hope this helps.

  Alejandro

• PLL error-1074118135 could not phase-lock of the external reference clock

  I tried to block the generator of signals Vectoriels PXI-5671 until its source Ref in instead of the clock on board and it is the following error is received:

  Error 1074118135 has occurred to niRFSG wait until what Settled.vi

   

  Possible reasons:

  The converter has reported the following error:

   

  Measurements: PLL could not phase block for external reference clock.

   

  Make sure that your reference clock is connected and that it meets the specifications of the voltage and jitter. Additionally, make sure that the reference clock frequency is correctly specified.

  The clock source I use is the right frequency (10 MHz) and levels (I tried + 6 dBm and + 12 dBm). However, I was never able to get the 5671 to lock to the Ref in the clock source. Any thoughts?

  I haven't dived in the measure of the quality of the 10 MHz clock source that is fed to the VSG but it comes from a device of precision GPS timing, so I'm optimistic that the quality of the clock is within tolerances of the plug VSG.

  Hello tsileo,

  The 5671 requires that you provide it a square of 10 MHz wave which is free race to +/-0.5 ppm precision. I think that the amplitude levels look correct.  I would like to confirm the accuracy of your GPS unit's clock.  I also would ensure that free running clock is scheduled before the NOR-RFSG task.  According to the frame that you use, you might be able to try to connect to the clock of 10 MHz of the chassis with the REF in connector just to make sure that there is not something wrong with the device.

  Kind regards

  Paul C.

• Update of master pages and formats in several dynamic projects

  I'm a student just starting to learn FrameMaker, so I apologize if this is an inappropriate question. While I was do pretty well with the program and completed a few fairly important projects, I have not really seen how FrameMaker is used in major projects in the industry. So I tried to think about questions that may arise. One that occurs to me is the scenario where a number of computer manuals for a family of products is developed. They all need to be formatted in the same way. Of course, you start by developing a model with master pages and then start each manual based on this model. But then what happens if we discover that for some reason any, that we have to change a graphic on master pages (or something on the pages of reference, a paragraph tag or a variable)? On the import of these things in another file, it is a possibility. But all those working on the project have to do it manually for each file in every book? Or y at - it a way to get these things put updated dynamically across multiple files?

  Or I'm misunderstading how such a project, and so this is a false problem in practice.

  Thanks for any clarification.

  Import formats is very flexible.

  Brief description of van of synchronization of formats across two or more files by importing them from a master file is excellent. However, it highlights one of the problems with the feature import Formats: it can import that categories of full format - all the variables, the paragraph formats, etc. To selectively import only a part of a category of format, savve a copy of the main template under a new name, then delete everything unwanted in each category of format, save the file, and then use this model custom as the source for the file > import > Formats.

  Google search for terms such as "suppression of the FrameMaker formats", without the quotes, for more details.

  You can also use a custom master file to create new formats and import them into your main template file, or you can keep this custom template independent of the general model and the new formats for import it.

  HTH

  Kind regards

  Peter

  _______________________

  Peter gold

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• I forgot my master password and now I can't change or turn it off. How can I recover it?

  I can't remember my master password and therefore cannot use it, disable it or change. How can I get it back?

  If you don't remember the master password no then watch this support article.

  • https://support.Mozilla.org/KB/forgot+my+master+password

  The password used to encrypt the passwords stored in the logins.json file, and without the correct password, you can no longer decipher and passwords for access.
  You lose all passwords if you use the chrome URL or delete the files key3db and logins.json to reset the master password.

• Questions of master password and thunderbird

  I just discovered that in thunderbird, the saved passwords are easy to see if you know where to look. I don't like this idea even if I'm the only user, so I want to have an additional password it but before I do I have a few questions so I hope someone can answer.

  -I only use Thunderbird but not firefox. Now, I don't think it's a problem, but he says you must complete for each session. The fact that average each time I start up Thunderbird?

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  The password protects the account passwords that you told Thunderbird to remember. It does not protect the content of the profile.

  If this answers your question please mark the thread as "resolved".
  Thank you.

• Downloaded Firefox to my computer. He installed a master password and I have no idea what it is. Any suggestions?

  This morning, I downloaded Firefox to my desktop. He asked the master password whenever I have a site where I have to enter my password. I don't know what it could be because I did not have a master password and he asked one during installation. I tried to turn it off, but it does not work because you must enter the password. Does anyone have suggestions on what to do other than go back to Internet Explorer, which I prefer not to do?

  Had never installed before Firefox? If so, your new installation picked a former framework. Otherwise, hmmm, very strange.

  If you do not want Firefox to save connections, you can disable it and that should eliminate the prompt for the password.

  Orange Firefox button or classic menu Tools > Options > Security

  Uncheck "Remember passwords for sites"

  If you do want Firefox to store connections, you will need to clear the master password. This will remove the connections already registered. The following article has the steps to do this: I forgot my master password. Troubleshooting | Firefox Help.

  Who help me?

• What reason is there to find my friends send me the mesasge 'Location not available', even though the iPhone, I'll try to find is always on and always is sharing its location with me?

  What reason is there to find my friends send me the mesasge 'Location not available', even though the iPhone, I'll try to find is always on and always is sharing its location with me?

  Hello

  If there are several device linked to the account, it's probably just that it took to give the positions of the other device or the iPhone is not connected by wifi or cellular connection.

• Digital output on two fronts and internal clock edge

  Hola,

  I use a PCIe-6537 and LabView 8.6 unit. This unit has an internal clock up to 50 MHz. I am trying to output a digital square wave at the maximum rate of 50 MHz I put my 50 MHz clock frequency, build my table of 1 and 0, convert it and the digital waveforms (on port0/$line0 if it makes a difference) output. During playback of the wave on a scope it shows a [very] good, but only 25 MHz square wave. The reason for which I believe is being only a sample of output (1 or 0) DAQ card for each rising edge of the clock and not fall. This is why the output wave will always be twice as slow as the clock frequency. Is there a way to power on the edge both amounts and descendants of the sample clock so that I can get a square of 50 MHz, wave or should I try a different technique?

  I'm all ears...

  ~ JS

  ISO

  The ability to generate/acquire both the rising and falling clock edge is called double rate (DDR).  We have an application on the use of DDR note with our instruments.

  Of the advanced features of digital devices: Double data rate

  The Board you use, however, is not capable of a double speed.  The only devices capable of DDR at the moment are the NI 6561 and NI 6562, which were maps LVDS.  You can get out on the forehead or the edge down, not both.  You can use an external circuit to generate a signal of 50 Mbps.  Basically, would need you an XOR gate and combine two different ways to create a signal 50 Mbit/s on a 50 MHz clock frequency.

  Here is an example of how you can achieve.  The white paper I mentioned above will guide you in this process.

  

  On the other hand, we have boards of 100 MHz that will give you a square of 50 MHz, similar to the desired wave.  The NI 6542, 6552, 6544 and 6545 are all 100 MHz or higher.  The SMU-6545 is a 200 MHz Board.  You can use one of these tips to generate higher frequency signals.

  Hope that helps.  I would like to know your opinion on this.