Properties of specification to Build FPGA, compactRIO

Similar Questions

• Error when create control LabVIEW FPGA CompactRIO

  I have error when you try to create a new model of LabVIEW FPGA CompactRIO control project. I tried with LabVIEW 2014 and 2014 SP1 update. This error always occurs.

  Please help me with this.

  Kind regards

  Thang Nguyen

  Hello

  I fix the problem by removing LabVIEW 2014 SP1 and reinstall again. After the reinstallation of LabVIEW, I create the project template.

  Kind regards

• FPGA CompactRIO FPGA serial number

  How can I programmatically determine the serial number from the backplane compactRIO FPGA?

  How about this: http://sine.ni.com/nips/cds/view/p/lang/en/nid/209115

• Choose ISE or Vivado Xilinx tools for a specific compilation of FPGA

  Hello

  Is there a way to specify what version of Xilinx Compilation tools to use when compiling an FPGA VI? I want to try the version Vivado tools rather than the version of ISE to see if there is an improvement. I have listed some information on my setup below.

  It's my current setup:
  NI5772 / PXIe7966 digitizer and FPGA
  SMU-1082 chassis
  SMU-PCIe8388 / SMU-PCIe8389 controller
  LabVIEW 2014

  In the past, I used the LabVIEW 2014 FPGA Xilinx tools 14.7 Module to compile my code. But I also want to try the version of Vivado, "LabVIEW FPGA Module Xilinx tools Vivado 2013.4 2014', to see if it gives better results."

  Page-based "compatibility between tools Compilation of Xilinx and FPGA hardware OR" here:
  http://www.NI.com/product-documentation/53056/en/
  Looks like the PXIe7966 FPGA must be compatible with the tools of Vivado 2013.4.

  I tried to uninstall the version 14.7 ISE tools, and install the 2013.4 of tools Vivado (so Vivado 2013.4 tools are the only xilinx tools installed on the computer). But LabVIEW complains that the ISE 14.7 tools are not installed and does not compile the FPGA VI.

  Thank you!
  Michael

  This FPGA is a Virtex-5 FPGA, so you're stuck with ISE.  You need a card FPGA that either uses the architecting chip (I think it was only in cRIOs) or 7 Kintex to use the compiler to Vivado.

• Xilinx FPGA target properties options is not available

  Hi all... I have a little problem.

  I can't have Options of Xilinx FPGA target properties to change the goal of optimization of the synthesis of area instead of the speed in 2012 of LabVIEW. Please let me know the cause and the solution to this problem.

  Thank you.

  Coelho,

  Interesting, looking to the right place for the compiler options? Compiler options will not be under 'Properties of the FPGA target' as you mentioned previously (sorry I missed this in your first post), rather these options can be found under the heading 'Options of Xilinx' when you create a specification to build FPGA for compilation.

  "" Click on build specifications ' New ' Compilation, and then select the Options of Xilinx category and you should see a window like this.

  

  Can you confirm that you are looking at this place?

• build specification missing properties

  I created a build specification for my project, but the tabs for the information in the dialog box, shortcuts and additional installers are missing.  See attached screenshot. How can I make it appear?

  David

  You will create two specifications: (1) build the exe. (2) create an installer for the exe. One you have both in your project, you can do a "build together" when right-clicking on the header section of specifications of generation.

• specification of the building does not start

  Hello

  I am trying to build a standalone application that would start when PSC 2210 controller is started.

  In my project, I use specification to build everything first build specification. I put it in the startup. Then I deploy the specification and some libraries which include variable necessary shared. Without errors or warnings are displayed. Then I start my PCP to see if something happens. I have a small LCD screen connected to the controller of the PSC which should show a text that the application starts. LCD screen shows no traces of event. But I still think that there is something with the controller, because I can not connect to the controller unless it is in a position NO App.

  If I then set controller on the position of the No. App and start the vi of the project under the CFP-2210, application start, LCD shows everything is OK. But there is now an error message while deploying "LabView: the startup application configured to start was absent at the start of the RT target."

  Can anyone tell what is missing and where? I know that I added vi wanted to start in the startup list screws in my real application of time when generating specification properties.

  I'm using Labview RT 8.5.1 on PC and PSC 2210.

  Mika

  I solved the problem. The problem was the path of the startup.rtexe file. RTTarget.ApplicationPath=/C/ni-rt/startup/startup.rtexe should be RTTarget.ApplicationPath=/ni-rt/startup/startup.rtexe and RTTarget.VIPath=/c/ni-rt/startup should be RTTarget.VIPath=/ni-rt/startup.

  This path should not have the / c forwards. It's a little weird for me because it is defined like this as a default value. I mean Build specification which defines as target path when opening, and all other files and folders still exist in the right places. Know not working very well, but I do not know if all the real things are saved in the right places.

• Modify a build specification

  I just made the leap of Labview 7 to Labview 2011.  The thing about the whole project is new to me.

  How to modify a build specification.  I want to add dynamic vi to the specification to build, but I don't see a way to edit an existing build specification.  I'm sure it's a simple thing to do, but I can't.  Any help appreciated.

  David

  It is not a strange behavior. You're not doing things. You do not add the files in the specification of generation - add you them to the project. Once they are in the project, they will be available in the files of the Source tab.

  Please see the documentation for the aid of LabVIEW on project management.

• Build specification does include all of the files for my VI.

  Hello!

  As part of a semester project, I have to build a VI to control a filtration unit. The VI works fine on my computer, but I control the next month and I need to send files to a person on the University. The problem is that even if I use the function 'Build Specification' (I use the 2011 LabView professional development system), the files are still missing when the program is started on the new computer. A warning in the project file indicates that the files are missing or removed to another location. A file named pid.lib is not found, and it seems that the path of each file is the same on my computer, but does not change the specification of build that adjust the new computer.

  I am a newbe LabView and I have searced this forum and help files to try to solve this problem by myself, but now my time is more limited. Can someone help me with this?

  Henrik jepsen

  Master Chemical Engineering

  Denmark

  Hi Henrik

  You can see what versions of LabVIEW and toolboxes installed in measurement and Automation Explorer (MAX). If you MAX Open and select 'my system'--> 'software in the menu of left, then you can see all installed software.

  

  If you click on the installation of LabVIEW. In this case, LabVIEW 2011, you can see all the installed tool boxes.

  

  When you run a LabVIEW project / application on another PC, LabVIEW will use a priority defined in the place where to load the files to. This is specified in Tools--> Options-->--> VI search path Path.

  For LabVIEW will be frist was trying to find the VI/VI library in your project folder and if the VI is not located there it will look like for her as a function of generation in vilib, userlib or LabVIEW instrlib files. These files contains VI and VI installed with LabVIEW libraries.

  In this case, as mentioned above you correctly do not have the same toolboxes installed on both machines. This is why the PID.lib is not found in the vilib folder as it should be, and so you get the error. You can check by looking at the installed modules, as mentioned above.

  Best regards

  Anders Rohde

  Technical sales engineer

  National Instruments Denmark

• Impossible to acquire constant values on FPGA in CompactRIO.

  Created a VI to acquire data from the analog input NI 9201 on the target FPGA CompactRIO 9004 and chassis 9014 module. We used DMA FIFO to transfer the data to the target FPGA for the RT. RT, read us this FIFO and then forwarded the data to the binary file to nominal vi. A possible problem could be that the binary file for vi nominal is acvquiring of the fixed point directly from the read FIFO data and therefore wrongly calculated. So we put indicators after reading the FIFO to check the values of fixed point. A constant supply of 5v has been read 4-5. But there are a lot of unreasonable variation. Is there another step I need to take to convert this binary fixed point? Is there something wrong with the FIFO DMA timeouts? I enclose all relevant VI.

  Hello

  What is the range in which the values are different? Also put a low-pass filter will help reduce the noise, if you want to measure the continuous tension only.

• RT construction specifications: category of component definition does not

  Hello

  I use LabVIEW 2013 SP1 f2, with real-time 13.0.1

  When I open the properties page of a build specification Application in real-time (to run on a cRIO-9075) and select the category of component definition, I find that the following occur:

  -LabVIEW unresponsive and think for a while. It takes about 20-30 seconds to finally display the component definition page.

  -When I click on create a component definition file (.cdf), nothing happens. As I write this, I see 'required software components', and then they are grayed out: "The software component Description" and "Software version" - but there is nothing to choose or change?

  -If I click on another category, it takes in the order of 20 seconds to finally see the establishment of this category.

  -To close the build specification (press OK), it also takes a long time (more than 60 seconds).

  -Things are fine with the construction specifications if I ever fall into the category of component definition.

  Everyone knows this?

  Any help would be appreciated.

  Hey Chris,

  I believe that the next patch is the solution you're looking for.

  LabVIEW Real-time Module 2013 SP1 Application Builder Patch details

  http://digital.NI.com/public.nsf/allkb/D72B45C6905D327A86257CC800547992?OpenDocument

  There is a link to download the patch at the bottom of this page.

  Kind regards

  Ryan

• LabVIEW fpga 2012: problems

  Hello

  I'm trying to interface labview fpga to 2012 with Spartan E 500

  I am facing two problem

  a first in the figure below when I try to download Flash memory of Spartan E?

  I run vi on Spartan works well but when I download it the error appear

  also there is no "" "run when loading" "button which are available in a previous version of labview.

  Please help

  

  I don't have a LVFPGA version with the support of 3rd Spartan installed in front of me, so I'm working from memory here, but the option to run the VI on charge moved to the target property page (available on a right click on the target'Properties) of the standard build for the VI (as shown in your own message here)

• FPGA: 'the bitfile signature does not match." Any changes made

  Hello

  I have a project involving a cRIO9082 and its FPGA target. My problem is that I keep having to recompile the FPGA build, even when I have not changed anything. Is there a setting I'm missing here?

  Thank you

  Ok. It is difficult to say why his need to recompile, but the quick fix is here: Configure open the VI FPGA to open bitfile, not the VI (you will need to create specifications to build on FPGA, integrate the bitfile VI).

  With regard to the reasons why he needs to recompile every time:

  -Are you moving this code between different machines (via control code source for example)? Different version (SP) of the LV or FPGA module may be the reason.

  -Make changes in the subVIs of your FPGA VI main?

  -Do you have screws that serve both on FPGA and RT?

• FPGA Compile Error - Xilinx error

  I am compiling my FPGA VI on my laptop and have failed to do.  The VI compiles correctly on my PC lab.  I tried to uninstall and reinstall LabVIEW FPGA and Xilinx tools without change.

  I'm running SP1 2014.

  I've attached my log for compiling file.  I tried to geenrate a new specification to build with no change.  Compilation of a white VI works fine.

  The FPGA VI has some registers and interacts with the DIO card using FPGA.

  I appreciate all help.

  Matthew

  So, I finally determined what was the problem.

  I had created a junction of Windows for several directories for some files out of a second disc of port.  As regards to Windows is, C:\NIFPGA is exactly and is supposed to hide the fact that he is really D:\NIFPGA.

  Well, apparently, he does not hide that quite some programs.  I noticed in the Xilinx log file that it maintained exchange between C:\NIFPGA and D:\NIFPGA.  So, I tried a Windows symbolic link to Diretcory, which is similar to the junction (according to my research, the junction is supposed to be the 'best'), and now it seems to work correctly.

  So the lesson here is: If you want to move this directory NIFPGA, reinstall the system, or use a symbolic link to remap the directory, not a junction.

• FPGA project daily Software development management

  I noticed that every day when I finished the work on the project and take a copy of this project and rename it to serve the next day and open FPGA vi in the new project file, Xilinx begins once again compiling FPGA VI. Is there a method that I could manage my daily work so the next day, I opened the FPGA VI of new folder, it will not ask for another compilation?

  Kind regards

  Austin

  Hi Austin,.

  I reproduced the problem as follows.

  (1) create a folder and save a new project inside
  (2) create a FPGA target in the project

  (3) create a simple FPGA VI under the target
  (4) create a specification to build for the FPGA and compile it.
  (Note that the automatically generated name to the bitfile)

  5 *) copy the folder with everything (folder project, FPGA VI, bitfile, alias, etc.) to another folder
  6 *) try to run the VI freshly copied directly under the target FPGA (it will start to compile)

  Reason: The name of the bitfile you specify (in the build specification) has changed to a new name that didn't exist not before, so try LabVIEW compiles again.

  Here's my spec to build the original project...

  

  Here are the specifications of the copied project...

  

  If you replace steps 5 & 6 with 2 steps, it seems to prevent the recompilation.

  5 *) copy the original file with everything in it
  6 *) this time, change the name of the bitfile in build specification copied the same as the original name of bitfile (see step 4)
  Run the FPGA VI and you will notice that you will not need to recompile this time.

  Thanks for your time,