Read the counter timeout in synchronized to count-analog input


Ciao, Giovanni.

The two tasks are run in parallel so there is no guarantee which task starts first.  I suspect that when you are away from the counter samples, it is because the task of analog input before starting the task of counter.  In this case, the task of counter would be ready to accept examples of clock and may be missing some edges of the clock at the time wherever he is started.

One way to solve the problem would be to use the wires of the error in order to ensure the time started the task of counter in front of the task of analog input.  You can also use a sequence structure to do that.

The counter is sampled on each edge of the sample clock HAVE no matter what you set the 'rate' of entry to the. When you use an "external" clock (external to the task that is), the driver uses just the entry rate to set some default parameters (size of buffer for example).

If you have any questions, feel free to ask!

Best regards

Tags: NI Hardware

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