Terminal double knot of FPGA NI 9213

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• Do not understand why "the node fpga Audio IN Terminal is 16-bit signed integer"?

  Hello

  I work with myRIO 1900 for my project of ANC.

  Audio IN of the fpga node gives its type terminal data as integer signed 16-bit. So, finally the exit on the nodes of the fpga is fluctuating between two values - 1 and 1. But I want the actual values of the audio data, I did not understand how to address this problem.

  Audio In on the side of RT gives type of terminal of data such as actual values, but I did not understand why the terminal of Audio In FPGAs is 16-bit integer. ??

  Please help me solve this problem.

  Thank you.

  If your analog range of +/-2.5 V.  32768 then--would be the equivalent of-2.5 V.  32767 would be + 2, 5V.

  If you get + /-1 V, then you should see somewhere between + / 13 107 on the analog input of the number I16.

  Basically, take the n ° I16, divide by 32767, multiply by 2.5.  You will have your analog input in volts.

  I don't know why you thing it's just rounding up to the-1 to + 1.  Something must be wrong with your code or configuration.

• 32 x 1 double switch configuration PXI-2527 and TB-2627

  Looking for configuration of the PXI-2527 at double 32 x 1 using a TB-2627 terminal block.  Under the OR rocking support for topology multiplexer NI PXI/SMU-2527 1 double wire 32 × 1 -.

  (link - http://zone.ni.com/reference/en-XX/help/375472C-01/switch/2527_dual_1-wire_32x1_mux/) it displays the names of software for different PIN numbers.  I don't care actually on this subject because I use the Terminal Board, but what worries me is that the diagrams represent Ch0-Ch31 connection com0 + and Ch32-Ch64 to com1 + and there is NO mention of com0 - or com1.  However, the NI TB-2627 installation instructions, table 4 shows the mapping Terminal double 32 x 1 1 - Wire topology.  In this map, IT lists a software name and the name of Terminal for com0 - and com1-.

  My question is, if com0 and com1 - are not listed in the manual switch why are the listed in the TB-2627 manul and what is it in this configuration?

  Thanks for your time.

  In the Setup instructions for the double configuration 32 x 1 TB-2627, she mentions Com0 - and Com1 - as a reference to inform the user what pin connects to since this same module can be used with other topologies. It is unnecessary for the topology of 32 x 1 information double since the switch card does not use these channels for this particular topology. Information is available for your reference, but does not neet to be connected to anything.

  Please let me know if any of this is unclear.

  Kyle K.

• digital output usb6009 does not switch does not correctly

  Hello

  I have a little problem with my 6009.

  Basically, I switch the inputs of a Demux (74HC238D) (3 lines) write an address on it to select rows of data off the Demux.

  The signal from the acquisition of data through an FPGA and the signal is displayed on the input pins Demux.  That is the problem.

  (It is worth noting that the FPGA is well programmed (coz if it was'nt then the signal would not get the demux in the first place.))

  When I connect the inputs of the FPGA to 3 digital lines of data acquisition and scroll lines (turning each one WE and OFF), the signal appearing at the Demux pins is not a proper logic level. (the voltage I measured the scope is about. less than 1.1 V). For this reason I choose any line, Demux output will always be on the first channel and will not select the other channel.

  I tried the same test 7 connect supply of 5V data acquisition (each line) and after having programmed the FPGA, the correct voltage level is available on the DEMUX pins. The problem occurs when I try to scroll through the entries via the software.

  I'm not which is the cause. My belief is the acquisition of data.

  What are your suggestions?

  Thank you

  Labmat

  Hi Labmat,

  The first thing that jumps out to me is the fact that you use these signals to interface with an FPGA. Outputs digital USB-6009 are 5V or 3.3V TTL and commonly FPGA i/o is 3.3V. Just to double-check, as FPGA did you use?

  Q: When I connect the inputs of the FPGA to 3 digital lines of data acquisition and scroll lines (turning each one WE and OFF), the signal appearing at the Demux pins is not a proper logic level. (the voltage I measured the scope is about. less than 1.1 V). I tried the same test 7 connect supply of 5V data acquisition (each line) and after having programmed the FPGA, the correct voltage level is available on the DEMUX pins. The problem occurs when I try to scroll through the entries via the software.

  A:  This no doubt hits the nail on the head. First of all, I'd be inclined to not use program any software directly and instead use some of the tools for debugging I/O connectivity that come with the Driver NOR-DAQmx. You can get these from the measurement and Automation Explorer (MAX).

  ' ' ' ' 'Start-up' all programs ' National Instruments ' measurement and automation.

  Expand the tree of devices and Interfaces in the left pane, and then select your USB-6009. Using the Test panels button on the right pane, you can quickly perform digital i/o with the device.

  Our best bet is to first take a multimeter and see if we can measure the correct voltage is distributed by the correct pins on the USB-6009 case.

  Now, by checking the box USB-6009 Datasheet, we can see that, on Page 17, there are a couple of different ways that we can configure the method by which the output signal is driven out of the unit; We have Drive open and active collector mode. It will assure you that since you are trying to send a signal to the FPGA, the unit must be set to active training mode, in order to generate signals from 0V to 3.3V . Output open collector allows the generation of signals from 0V to 5V . This can be done through property OR DAQmx nodes in LabVIEW.

  In terms of current...

  The + 5V line that you used for the FPGA Nailer is evaluated to 200 my. General DIO lines on the USB-6009 case can generate a current up to 8.5mA. This limitation fits the specifications of digital input of your FPGA?

• Several EAP ISE certificates

  Hello

  I am aware that the ISE may only use EAP for a certificate but is this limitation by interface or the entire node?

  If it's for the whole node then what is a recommended practice for EAP shared? All use a cert? Use several nodes of ISE?

  We are running a double-knot on 1.3 configuration

  Unfortunately, this is not possible. And I have not heard that it is on the roadmap.

  Thank you for evaluating useful messages!

• DR Set for Oracle SOA SUite

  Hi all

  We have to implement DR for environment SOA HA Production. Here is the overview of our production environment:

  1 load balancer F5 to load balance requests on the web node.
  2. two nodes of the web - OHS layer is hosted on the nodes
  3. two node cluster - SOA and OSB cluster SOA is installed on both production AppS node (Oracle SOA suite 11 g on dual Cluster node)
  4 node RAC database

  
  Infrastructure avilable Dr. implemented are:

  1 one Web node
  2. a single Application node
  3. the database node

  A standby node updated database in place is already done for DR replication on the end of DB.

  We have to set up the Web and Application Tier npw.

  Most of the documentation of Oracle that I lived contains as configuration. that is the DOUBLE knot DR put in place to double knot prod environment.

  But here, in our case 1 Web and applications 1 node Dr. While for production, we have 2 Web and 2 nodes of Apps.

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  Is replication required disk for everything other than JMS queue store directories? If reproduce us the JSM file storage will be relevant at the DR site?

  Is this Setup looks doable or do I consider something lse as well?

  Configuration asymmetrical DR for products of BCI is flly supported by Oracle, this can be achieved by creating alias on the primary and DR server name and set the services to listen on the alias name.

• Why do I receive errors of internal software: Terminal Index out of Bounds. Code error-61350, when compiling my FPGA VI for a cRIO-9118 using NI 9223?

  I get the error (in a popup window) when my VI FPGA code in chassis 9118 OR NI 9223 module compiled help.  This error occurs when compiling the process (generating intermediate files, scene 7 of 7). How to solve this error?

  Thank you

  additional information:

  Original error message:
  -------------------------

  Errors:

  Software (s) internal error: Terminal Index out of Bounds.

  :-61350 error code

  Details:

  A terminal with this index does not exist on this block diagram node.
  NiFpgaHandleCallbackError.vi

  «"" "String of full appeal:»»"»
  NiFpgaHandleCallbackError.vi
  niFpgaNodeInformation.lvclass:Get Const Variant.vi
  DfirModGen.lvclass:GetConstant.vi
  niLvFpgaMungerBrainwashIONodeCommon_Dfir.vi
  niLvFpgaMungerBrainwashSingleIOGrowableMethod_DFIR.vi
  nirviEIOMethodImplementation_SpecifyDFIR.vi
  nirviEIOMethodImplementation_SpecifyDFIR.vi.ProxyCaller

  

  Hi tesa,.

  This is a bug that has been fixed in LabVIEW 2012 SP1. The number of CAR created for this bug is 332811 and as you can see in this link, it is already in the list of bug fixes.

  Carmen C.

• How can I convert 9213 readings of TC in temperatures on FPGA?

  I use a cRIO-9076 with 9213 module to capture readings from thermocouples (type K).  Is it possible to convert these readings (voltage of the FXP Data reading) in the temperature on the FPGA values?  My goal is then to use these temperatures to control an analog output through a PID.

  According to the specifications, the 9213 should be able to read 8 TC to 100 Hz.  I would like to be able to run as fast PID TC can be read accurately.

  I couldn't find an example of code that does the conversion of temperature-voltage on the FPGA.  The example of getting started is send you the values of voltage of TC to the processor, RT, then converts the tensions in temperatures.  I was not able to get that to run faster that about 50 Hz in one analysis comparative VI.  Once I have add any other code to the RT target, I think I'll have to run a lot slower than 50 Hz.

  Any suggestions / examples / whitepapers can you tell me?

  Thank you

  John

  Hi John,.

  Take a look at the Started.lvpoj get 9211 from the Finder of the example. You can use the same screw of this project to convert volts to your 9213 module temperature. In order to preserve the accuracy of the readings, it is recommended to convert the voltage to temperature in your host VI. The rate of your control loop is not very fast, only so you should be able to run your PID loop and to convert your data to the frequency of 100 Hz to your host VI.

• Implementation of the heart rate in the FPGA vi to detect an abnormal termination of the host using the compactRIO vi?

  Hello

  I'm developing an app for the compactRIO systems. I want to implement a heartbeat in the FPGA code that detects if the host vi gave up. I also want the FPGA vi at the stop with a stop of the host vi command.

  I implemented the heartbeat signal within the host vi and the heartbeat counter is located in a loop of the single cycle timed (SCTL) in the FPGA vi. However, I have other loops while in the FPGA vi (b/c I/o analog are not compatible with the SCTL) and so I need to stop several multiple loops with a stop order from the inside of the loop cycle timed (by opposition from a user input, what you can do with a local variable).

  As I have now, when I download and run the code to my compact goal of RIO, and I abandoned the host vi (and not by pressing the stop button), the code in the SCTL stops, but on the other the loop is not. Can anyone help?

  Greetings Andrew P.

  I took a quick look at your code, and while I'm not completely sure of the cause of the behavior that you are experiencing, I noticed a few things in your FPGA code.  First of all, it seems that you use an appropriate method to report the other loop the SCTL is stopped due to the delay of heartbeat.  Secondly, it seems that the logic around the heart rate monitor can be a bit off.  Currently, you are taking the current value of the entry of Heartbeat/command and comparing it to the value returned by the shift register using a not equal to vi comparison.  This allows to detect a change in the status of this entry if the shift register is providing the value of previous to this entry.  However, it seems that you take the value of the comparison is not equal to to fuel the shift register, rather than the current value of the control of heart rate.  What happens if you change?

  Kind regards

  Michael G.

• Double-click the object of front panel to find the terminal block diagram

  Hello world. I don't know why, if I double click on an object to front panel, labview opens the front tab customize, instead of finding control in block diagrams, which would be the normal behavior, as I read in http://labviewwiki.org/Tips_and_tricks#Debugging.

  I tried to reset the initial Setup by renaming the file LabVIEW.ini, but it doesn't seem to work.

  Do you know how double-click the object on the front panel and locate the?

  Thanks in advance!

  Guille.

  Did you restart LabVIEW after you rename the file labview.ini?

  There is an option (Tools... options...... general façade... 'Open the editor control with double click').

  It always seems to be set in your case.

• JULABO RS232, FPGA, RT, FIFO

  Hey there,

  attempts to establish a connection to a Julabo F33 ME cryostat. I'm using cRIO9074 and module: NI 9870.

  I got a model (FPGA.vi, RT.vi) of a colleague who runs his Circulator julabo on a similar system. Somehow, I can't return all of the controls on the device or get information.

  RT.vi: I've amended the vi to send a command (String: in_sp_00) to the julabo (Mod1/Port1). I send you only empty strings to other ports because I just want to test one. It must respond to a temperature of these, but I can't get an answer.

  I double checked the connections and settings for the COM port...

  Find the screw in the attachment.

  I hope someone can find mistakes.

  Kind regards.

  You can also include 'writing sub - VI'?

  A common mistake with the serial communication is to forget to include the character of termination or line break after sending a string. The cooler waiting orders will end with a carriage return, linefeed, or both? If so, you must include in the chain that you send. Right click on the command string constant, choose "display codes"------"" and add to a carriage return ' \r' or '\n' for a line of flow at the end (or press just press enter at the end of the string constant to add a new line, that often works too).

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  Once you get the pop-up, simply select "" boot mode safe. "

  

  If the issue is not present in Firefox Safe Mode, your problem is probably caused by an extension, and you need to understand that one. To do this, please follow article Troubleshooting extensions, themes and problems of hardware acceleration to resolve common Firefox problems .

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• Failed authentication, ARD 3.8, Terminal solution does not work

  Hello

  I'm on an iMac running OS 10.11.3, using 3.8 ARD to administer the computer of my children, which also runs OS 10.11.3.

  I have the remote administration and remote login enabled on the computer of those of children, and ARD has worked very well for about a week. But suddenly today, I get the error "Authentication failed" when I try to access the other computer. Double checked the system settings, but all distance options are always checked "on".

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  Re: How do you define the computer so that you can see with Remote Desktop?

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  I'm guessing that your portion of the IPS via DHCP.

  If that's true, my first guest would be that the IP address has changed.

  If you run the scanner, see if it displays the IP address of the computer you are trying to connect to. If it is empty, the IP address has changed and no longer 'find '.

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