NI Products

Compact Daq or Rio measurement signal and datalog

Hello I'm in a project to create a diagnostic for an offshore wind turbine generator system. So I have to choose a material acquisition and make the basic operations with the measured signals. The equipment has to work without being connected to a PC

Stand alone driver for the minimal application installer MyRIO

Dear all, I'm trying to deploy a full installation package for a laboratory study, which would include: 1. exe application file compiled from a VI. This VI connects to the MyRIO via network flow. 2 labview runtime engine 3 driver for the USB LAN unit

sampling frequency global myRIO

Hi Forums, Small question, the sampling frequency of myRIO HAVE is 500kS/s aggregate on the MXP connectors (A and B). My current thoughts are connected to AI0 - AI3 entries on connector MXP has, give me 125kS/s through, so ~ 62.5 kHz of bandwidth (pl

Drivers Xilinx/Multisim and Labview FPGA

Where can I find drivers for my FPGA OR if I use Multisim/Xilinx and NOT of Labview?  All the links I found are Labview be installed.  However, the explicit manual FPGA indicates that you can use Multisim/XIlinx ISE in place.

cRIO-9118 FPGA and or cRIO-9022 RT.

Hi all. Having trouble to get my design FPGA compile for the target. The error is the overuse of the DSP blocks. 64 available on target... Do I have to reduce to a minimum the number of blocks of multiplier? Or can I somehow multiplex on DSP minimixe

XNET read frame CAN

Hello I use Veristand 2011 and I worte a device custom for the reading of the electronic can over reading XNET CAN frame now my problem is, who is unable to retrieve the CAN-Messages. I could install my custom device CAN-Frame, but there is no inform

UDP read too Long timeout, Async Custom Dev fail Shutdown

Hello I've got a simple custom UDP for VeriStand receiver device that uses a timed loop. She has an infinite timeout so that I can listen on port constantly. I cancel the deployment every time I cause an error: 307730 Error Message: NI Veristand: one

VeriStand licenses options

Hello I was wondering what exactly includes the NI Veristand development Bundle of plugins? Does include the NI VeriStand full development license? (as noted here: I can't find any information a

Use of Custom Device or lvmodel real-time Module utilities

Hello I tried to understand how to use the RT Set processor pool inside of a custom device or lvmodel vi. My idea is to use one of my multiple devices customized to configure CPU pools in the VI Init. I added my custom for the device project PXI chas

NEITHER Veristand in Windows Server

Has anyone tried having multiple developers to share a NI Veristand installation on a Windows Server machine? Developers would use the remote desktop for the initial development, and all work together to test and debug console. I believe that the lic

API in LabVIEW VeriStand using for graphics

Hello I was wondering if anyone has experience reproducing graphics that accompany the VeriStand workspace in LabVIEW via the API. For example, should I use the block to get the value of channel to power a LabVIEW graph or is there another suggested

Download Bitfile to Flash on FPGA in VeriStand

Hello I was wondering how to download a FPGA bitfile for flash memory on a FPGA using VeriStand. I use a PXI chassis and a FPGA PXI R series. I hope that the answer is (1) configure the FPGA VI to run when loading on FPGA (2) open the VeriStand Syste

RT sequences in parallel in sync?

It is a follow-up on this post. I create several calls sequence on a given sequence, each with specific parameters: so I start them all in parallel: All sequences beginning in sync, or one after the other? THX. L.

VeriStand tutorial Installation: 'no software will be installed.

I try to install the NI Veristand tutorial.  I downloaded and extracted the file generated at my office.  When I run the installer, it says "no software will be installed" the second or third screen. There are a few other forum discussions on this to

Custom refresh device channels instead of remove device

One of the great pains that I have met is when you change i/o on a custom device, you must remove and re-add the device custom Veristand project for new channels in the project. This destroys all the channels linking and creates pain when changing cu

Table 2D-strings in the "get/set item property.

I am porting the code of veristand 2009-2010 and I noticed that the get/set vi item property does not the same. Specifically, I can't write or read 2D strings sent as variants. When I put the 2D table in a cluster, it works fine. Does anyone have inf

Profile of stimulus so stop procedure

Is there a way to stop a profile of stimulus through a procedure? Let's say that we have set up an alarm to trigger a procedure.  This alert is used to monitor a physical emergency stop button connected to a digital input.  When the condition of the

How to create a DLL from a .mdl file model to use on veristand simulink

Hi all I want to create a .dll file from a simulink model .mdl file. I created a simple "Sample.mdl" file that adds two entries and gives the result. Before you build the .dll, I tried to run file .mdl veristand. Here, I got the below error. Method 1

Running the latest Labview 2010 on new computers (Windows 7) but who have the older/more older material NI ELVIS

We are running the latest Labview 2010 on new computers (Windows 7) but have more older/more old material NI ELVIS (NI ELVIS I?). LabVIEW works very well and the device drivers are installed. What NI ELVIS software move us? The latest version indicat

Elvis II: FGEN, very fragmented signals low level

We recently purchased some Elvis II platforms: very beautiful products. In any case, we have a problem with ANY when the amplitude is very small (about 10 ~ 30mVpp) signal (osserved on the scope) is really fragmented. We use as input AI1 (FGEN at the
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