deliver the Xilinx IP instantiation with myrio

I can't instantiate all items in the range of Xilinx IP in my projects. I think I have all the necessary software installed, but there is always an error that says: "no repository of IP of the user not specified", even if I don't see IP functions in the directories in which he said his watch. So it does not configure a Xilinx IP.

All other settings I'm missing? I am able to compile and execute projects that don't use Xilinx IP.

I have the myrio-1900, running in windows 8.1.

Here is the output I get after pressing the button "Configure Xilinx IP" for floating point IP block. (Found in Xilinx IP-> mathematical functions).

C:\NIFPGA\iptemp\xipinBD40ED244EE942F7BF92AF0DE2FF7A66>set XILINX_EDK = C:\NIFPGA\programs\Vivado2013_4\ids_lite\ISE

C:\NIFPGA\iptemp\xipinBD40ED244EE942F7BF92AF0DE2FF7A66>cmd/c C:\NIFPGA\programs\Vivado2013_4\bin\vivado-batch mode - source 'C:\NIFPGA\iptemp\xipinBD40ED244EE942F7BF92AF0DE2FF7A66\init.tcl '.

Vivado v2013.4_ (AR59519_AR59812_AR59814_AR60501) (64-bit)
SW Build 353583 on Mon 9 17:49:19 MST dec 2013
IP build 208076 on Mon dec 2 12:38:17 MST 2013
* Copyright 1986-1999, 2001-2013 Xilinx, Inc. All rights reserved.

Attempt to obtain a license: implementation
WARNING: [Common 17-301] cannot get a license: implementation
WARNING: [15-19 Vivado] WARNING: no "Implementation" license found. This message can be ignored safely if a Vivado WebPACK or device-locked, common license for governing body kits, will be used during the implementation.

Attempt to obtain a license: synthesis
WARNING: [Common 17-301] cannot get a license: synthesis
Loading of the parts and information on the site of C:/NIFPGA/programs/Vivado2013_4/data/parts/arch.xml
Analysis of the primitive file RTL [C:/NIFPGA/programs/Vivado2013_4/data/parts/xilinx/rtl/prims/rtl_prims.xml]
Finished parsing RTL primitives file [C:/NIFPGA/programs/Vivado2013_4/data/parts/xilinx/rtl/prims/rtl_prims.xml]
Source {C:\NIFPGA\iptemp\xipinEA40085D63A44A87A9EE514E55C4BD3C\init.tcl}
# the value tempdir {C:\NIFPGA\iptemp\xipinEA40085D63A44A87A9EE514E55C4BD3C}
# define prjdir $tempdir\\temp
# set ipname Floating_dash_point_F16386491B674413A51B6154E16AFC29
# set ipdir $prjdir\.srcs\\sources_1\\ip\\$ipname
# set simprjdir $tempdir
# define simdir $tempdir\\sim
# set simproj $simprjdir\\$ipname\.prj
# set simvhd $simdir\\$ipname\.vhd
# set simvhdports $simdir\\$ipname\_ports\.vhd
# create_project $prjdir - hand xc7z010clg400-1 - force
# create_ip - vlnv xilinx.com:ip:floating_point:7.0 - module_name Floating_dash_point_F16386491B674413A51B6154E16AFC29
INFO: Repository of IP refreshing [IP_Flow 19-234]
INFO: [IP_Flow 19-1704] no repository of IP of the user not specified
INFO: Repository of loading Vivado IP [19-2313 IP_Flow] "C: / programs/NIFPGA/Vivado2013_4/data/ip".
# close_project
open_project # $prjdir
Analysis of the sources...
Completed the digitisation of sources
INFO: Repository of IP refreshing [IP_Flow 19-234]
INFO: [IP_Flow 19-1704] no repository of IP of the user not specified
INFO: Repository of loading Vivado IP [19-2313 IP_Flow] "C: / programs/NIFPGA/Vivado2013_4/data/ip".
# set user_ip [lindex [get_ips] 0]
# upgrade_ip $user_ip
WARNING: Upgrade_ip [Coretcl-2-1044] is not supported by 'Floating_dash_point_F16386491B674413A51B6154E16AFC29 '.
# set_property IP_OUTPUT_DIR $tempdir [lindex [get_ips] 0]
# set ipvlnv [get_property ipdef [get_ips $user_ip]]
# set fichier_IP [get_property IP_FILE [lindex [get_ips] 0]]
# define lic [get_property REQUIRES_LICENSE [get_ipdefs $ipvlnv]]
# {{$lic} if
# set fp [open $ipdir\\needlicense.txt w]
# close $fp
# }

When running
"start_ip_gui - ip $user_ip.
called inside
'set ip_name [start_ip_gui - ip $user_ip].
(file "C:\NIFPGA\iptemp\xipinEA40085D63A44A87A9EE514E55C4BD3C\init.tcl", line 24)
INFO: [Common 17-206] exit Vivado at Fri Dec 26 10:10:21 2014...

Hi jaimefmNI,

I have some difficulty to reproduce this problem on a Windows 7 PC.  Could you post the exact steps you take before the error occurs?  When fall you to the bottom of the floating-point function 5.0, select "Configure Xilinx IP", come from the floating-point dialog box, or you receive the error immediately?

I should also mention that the LabVIEW FPGA Module for the 2014 is not compatible with Windows 8.1.  Please see the attached Readme file for more information:

LabVIEW FPGA Module Readme 2014: http://www.ni.com/pdf/manuals/374737a.html

Thank you

Myriam

Tags: NI Products

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