Download Bitfile to Flash on FPGA in VeriStand

Hello

I was wondering how to download a FPGA bitfile for flash memory on a FPGA using VeriStand. I use a PXI chassis and a FPGA PXI R series.

I hope that the answer is

(1) configure the FPGA VI to run when loading on FPGA

(2) open the VeriStand System Explorer, set the initialization of the system to run a system to reboot definition.

(3) deployment.

Or is the bitfile stored on the hard drive to the chassis and then imported on the FPGA whenever the chassis is started?

If I cancel the deployment of the system definition file I guess the flash on the FPGA is deleted, is it true?

Thank you

Brent

Hi Brent,

I heard R & d today. VeriStand uses the open FPGA VI reference, which means that the bitfile will not be replaced if it detects the correct bitfile already running.

"(Par défaut pour certaines cibles FPGA, cette fonction s'ouvre et exécute le VI FPGA compilé sur la cible FPGA si le VI FPGA n'est pas déjà en cours d'exécution)." - 2012 help FPGA open Reference VI.

When the system definition is canceled the FPGA is reset to zero, which is the default behavior of the close FPGA VI reference.

"Farm the reference to the FPGA VI and resets the VI if no other references to the VI is open. Reset of the VI returns VI orders and States flags by default defines global variables uninitialized shift registers default values and clears FIFOs. "- 2012 Help close FPGA VI Reference.

Zach

Tags: NI Products

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