Sharing of Variables does not not under an FPGA interface?

Hi all

I have a controller 9074 cRIO 9074 chassis.

I defined a number of variables shared under my RIO controller and writing a UI VI in my host PC, where I feed some variables of network shared in RIO and get another return to RIO on the front panel of my host. Naturally, the VI which deals with read/write variable network data to IO channels real is under my RIO controller.

The problem is that, although everything seems to work fine when my RIO is set to the interface of the Scan Engine, the same screws give the following error message when I pass my RIO FPGA interface dependent.

-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Possible reasons:

CompactRIO: (Hex 0xFFFF0000) unable to communicate with the module. Re-insert the module and check the connections. If the chassis is in Interface FPGA programming mode, make sure that you have opened a FPGA reference bitfile or VI FPGA with the load of the Interface of scanning for the module you are trying to access using the scanning Interface.

This error or warning occurred when writing the following shared Variable:
\\AMR-cRIO9074\B1-DO\JCV1_C1_B1
\\160.40.15.231\B1-DO\JCV1_C1_B1

-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

Note that I get this error message for each channel of e/s that I call my RIO. Also note that it is there still no reference FPGA currently in any of the screws... I want to solve the problem is because later, I'll have to add some FPGA in my code, so I can not just impersonating my RIO scan interface...

Any help would be appreciated,

Harry

When you disable scanning on the cRIO platform engine, you must have some runing FPGA code.

There is noway that knows your controller on any module, and he can't read anything from any module.

If you do not have an FPGA vi, which sends the values of a port of the module on your controller, you need to do active Scan Engine.

The error message clearly indicate that you must have an open reference FPGA vi or analytical engine to be able to read the values of and to a module.

You are able to have custom analysis engine and a footstool of FPGA code at the same time on an FPGA.

Is there a reason you do not run with the scanning engine?

Tags: NI Software

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