Slices about 433 for a minimum function?

I designed a simple minimum function, which selects two numbers from the smallest. He needs a multiplexer and a comparator. When I compile it with LabVIEW FPGA, it generates me 433 Total slices, 513 slice records and 524 Slice LUTs. I don't understand why these numbers. When I draw it with VHDL in Xilinx get less than 20 slices. Why so huge?

Thank you

LabVIEW add bits and bobs on top of your code to enforce data streams. You can do things to optimize your code:

The following link may be useful:

http://zone.NI.com/reference/en-XX/help/371599H-01/lvfpgaconcepts/using_sctl_optimize_fpga/

Also

http://www.NI.com/white-paper/3749/en

http://digital.NI.com/public.nsf/allkb/311C18E2D635FA338625714700664816?OpenDocument

http://digital.NI.com/public.nsf/allkb/722A9451AE4E23A586257212007DC5FD

Tags: NI Software

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