Cannot use Select inside the loop For inside the SCTL (FPGA) - Bug? An alternative?

When I put a Select statement inside a loop in a loop of Timed Cycle in LabVIEW FPGA, I get the following error when I try to compile:

"An internal software error occurred. Please contact National Instruments technical support on ni.com/support with the following information:

Error-61003 occurred at

Possible reasons:

LabVIEW FPGA: you cannot include this function in a loop For when the loop is within a single cycle timed loop. »

I didn't know that whatever it is documented that says that this is not allowed; is this a bug or am I missing some documents?

The code that causes this error looks like this, inside a SCTL (ignore Boolean wire wandering behind the loop for)

I came up with the code below instead, which compiles into one Cycle timed loop, but it is a bit ugly. Does anyone have a better suggestion?

This issue is currently followed under the CAR # 592391. Please keep an eye on our patches and new versions as usual!

Tags: NI Software

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