How configure you synchronous AI AO with different sampling frequencies?

Synchronous input analog and analog out, changed for example, NOR results in noisy input if the sampling rates are not the same for AO and AI. What alternative will prevent the noise to be added to the AI? I use LV 8.5, PCI6251.

The sample program is attached and representative screen captures showing the increase in noise when the sampling rates are different.

Thank you

Hi stephanie,.

Unfortunately, because we did a "stutter" generation, seeds will be present as a clock signal is sent to the DAC each sample, despite the fact that it does not change the value it updates. Is it possible to decrease your rate of update to be as slow as the pulse width (or whatever your shorter time should be high or low) to minimize glitches how occur?

In addition, as I said in my post above, according to what are the rates, there is a property node synchronization you change (THE Convert.Delay of sample clock) to delay exactly when taste you from the edge of clock sample. I placed the program in a loop, loop through different values for delay and sometimes manages to find points where delay has moved the sample I update AO far enough so that the glitch was sampled not, or at least has been reduced to the minimum. Hope this helps,

Tags: NI Hardware

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