niHSDIO dynamic generation and Acquisition using LV configure Trigger VI

Hello!

My experience is limited within the environment of digital programming; Nevertheless, I have worked on this problem for a few days and would appreciate some comments if possible.

I am trying simply to generate and acquire a duty cycle of 50% of 8 MHz TTL pulse train on a PIN DIO of the PCI-6541 and acquire back from the signal on another axis of DIO. I have a connector corresponding to the embedded 6541 VHDCI connector which of course the generation and acquisition DIO welded pins to provide a loopback effect.

In short, I use the niHSDIO configure Trigger VI (instance--> start Trig: SW), niHSDIO send software Edge Trigger VI and write Named Waveform VI (instance--> data: 1 D U32) in the generation section. For the section of the acquisition, in short, I use the VI of waveform Fetch niHSDIO (instance--> single record: WDT).

I see results in the waveform acquired showing the generated and acquired digital TTL pulse on the respective DIO pins train, but I can't seem to get my 8 MHz frequency requirement. In addition, the lower part of the assignment of pin DIO, more frequency. Unfortunately, due to the configuration system required, I have confined myself to pin 12 DIO for the generation of digital pulses. Even with a 50 MHz clock frequency, I'm ~ 6 kHz of frequency acquired max. I looked at changing the parameters of the wave form VI named write, but it is not possible because the VI call a library function node. I also tried to generate a waveform of 8 MHz through a VI of generator of digital model, but I do not believe, you can trigger on generated waveforms? It seems that you must generate data using a simple loop to as a counter and sending the result to the waveform VI named write. Are there other ways I can simply generate and acquire a digital signal of TTL of 8 MHz (no external connection)?

In any case, any kind of feedback would be greatly appreciated.

Thanks in advance for your time.

Dan

Dan,

Sorry about the nomenclature.  I usually use 0 x or 0 b for indication of radix, it is not necessarily a kind of standard, just what I used in my old days of the Assembly.

Looks like you have a knowledge about the data.  Basically the material is just save in DRAM an array of words of 32 bits, with each bit corresponds to a data channel and each element being generated to the sampling clock rate you enter to your vi.  Everything else is just easy data manipulation or usage.  The interleaving method is just as I like to create a toggle model.  You can easily do a loop with an inverter and feedback node or use on the construction in screws to signal generation.  In addition, you can use the software digital waveform editor or control panel test to generate the county or toggle modes.

Give us an update when you enter the laboratory and let us know if you encounter any other disorder.

Tags: NI Hardware

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