Question about 6674 t FlexRIO 7966R and Module AT - 1120 FAM DSTARA

Hello

I have a chassis SMU-1085 and following committees installed:

Slot 10: Module of synchronization for the SMU-6674 t

Slot 02: SMU-7966R FPGA

Attached to the SMU-7966R FPGA is a module of adaptation AT1120.

I'm trying to provide a clock of 125 MHz by the 6674 t the bottom of basket DDS output to power the clock DSTARA the SMU-7966R and then the module adaptation AT1120 as the clock of the DAC.

I'm currently using a modified version of the AT-1120 Getting Started project (https://decibel.ni.com/content/docs/DOC-26331) and have the Adapter Module set to take an internal clock and from FPGA clock as specified in the AT-1120 user manual:

For my adapter module CLIP on the FPGA VI I have the clockin set to the DStarA Clock as shown below:

For my FlexRIO 7966R I have the toplevel clock set to the defautl 40 MHz onboard clock. I cannot use an external clock for this:

Then I have my SCTL clock set to the DStarA Clock:

For simplicty sake, I am trying to feed the DSTARA clock using the test panel in NI Max with 6674T as follows. Becuase my FPGA is in slot 2 on the 1085 Chassis, I am feeding the 125 MHz DDS frequency to PXIe_DStarA6 based on the PXIe-1085 user manuel (http://www.ni.com/pdf/manuals/373712e.pdf) specified timing DStar lines:

 
However, when I try and run my VI with all of these settings I get the following error:

 
Has anyone seen this, or can anyone advise regarding this? Maybe I'm using the DStarA lines wrong or something, but I'm not sure. Any help or suggestions from the community would be great! 
 
Thanks for all your help!
 
-GMac
 
 

GMac,

Hello!

There are three things that I think that in the combination will solve this problem.

1.) can not included it in your screenshots, but there is an extra step you need to do to use the DSTAR. The bitfile you are using must be respected with a parameter that indicates the FlexRIO use the signal DSTARA.

  1. Right click on the Module adaptation of your project and select Properties
  2. Go to the category details
  3. Make sure that "PXIe_DStarA" is selected in the section "IoModSyncClock".
  4. If it is checked, then you have probably already chosen it and compiled your bitfile. If it is not selected, or you are not sure if you have compiled the adjustment, re - compile your Bitfile.

2.) also, what you see was a known problem that has been fixed in Active Techonologies (AT) last software update (version 1.8). While I'm not 100% certain, I don't think the example started to get has been updated so that it includes all the screws of the ATs software update. Similarly, the bitfiles provided with this sample would have not generated with the CLIP included in the latest version of the software.

I suggest the following:

  1. Download the latest version of the software (version 1.8) AT their site
  2. Use the example that comes with their software to confirm that you can clock at DSTARA
  3. Update of our example started to use the latest version of the software. (generate new bitfies, replace the old screw in the directory of the project with new screws)
  4. Confirm your new works for example.

3.) generate a signal from 125 MHz of the 6674 t, not 124,98 MHz. The material is expected a 125 MHz signal. Dialog said 124,98 MHz with workaround for an odd present which was causing compilation failures.  If you would like more information about this, let me know and I'll fill it in you read this post on the forum: http://forums.ni.com/t5/LabVIEW/7966R-DSTARA-Clock-and-AT-1120/m-p/2932916#M847692

I hope this helps!

Tags: NI Software

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