240 bytes of load to the PXI-5152

Similar Questions

• Use the PXI-2630 terminal block in a matrix configuration?

  My apologies in advance for the length of this post!

  I use the PXI system with PXI-2530 switch modules, related to a series of USE with PXI-2632 (1W matrix 8 X 16) connector blocks and a PXI-4071 DMM for each switch module. My request, uses the PXI system for measurement of current and voltage external to verify and/or benefit from restraints of reliability. A requirement of the application, therefore, is that there must be a ride from DC through each USE with change of the minimum impedance as the application between its "bypass" mode switches and its mode 'measure '.

  I used this Setup with connector blocks of matrix in conjunction with one of our test systems, and I am satisfied with the results. I started working with the Test System, has no easy connection to catch HAD, I needed to build a kind of interface the PXI system and a resistive faced load HAD, it was not difficult to build in the wires that attach to the Terminal screw of the 2632. He did turn into a nest of a coded son rat I did my best to keep clean and tidy in different bundles, however. Fortunately for the cable fasteners!

  My next task is to use this application with system B Test, which has an interface of pines buck header with which each signal that goes to or from the DUT can be obtained. No welding or pass the wires through the openings where the designers have no intention of son to be stuffed. I intend to build a break-out Board that allows simple connections between the modules PXI and the number of Test B system which we have or will have in our laboratory. In order to simplify the configuration/installation, I want to reduce the number of connections to terminal block screw. Preferably, I would like to completely remove the screw terminals and use lever-based connections where I can't have mating of the headers. The PXI-2632 terminal blocks unfortunately use Terminal screw.

  In matrix mode 8 X 16, the closing of the PXI-2530 switch kcom1, 3, 5, 7, no matter what points in the array are connected. A link between the row of right and column C is done by closing the switch corresponding to k (16R-C). I checked using the Soft Front Panel.

  I also have a number of connector PXI-2630 blocks. These are intended to be used with the switch module in one of its MUX modes and include 8 banks of connections of the header 2 X 9 pins. In the the 2530 documentation and 2630, I identified that switch k-x is associated to chX output pin, ch0-15 related to the pins 1-16 from Bank 0, C16 - 31-associated pins 1-16 of Bank 1, etc.. X = 16 B + P-1. PIN 18 of each bank is used for independent MUX topology comX. Pines multiplexes sixteen seem to correspond to the sixteen columns of the matrix, with eight common lines corresponding to eight lines.

  Here's what I would do, but I would like to ping the forum to see if anyone tried something similar and wisdon to share the thought:

  • Make custom cables which connect the pins 1-16 of all eight banks 2630's header with a single Ribbon connections 16 son carrying the signals emitted by the interconnected banks (poles!).
  
  
  • The custom cable bundle will also include a wire connected to the pin18 of each of the eight banks (line connections!)
  
  
  • 24 total wires in the harness will end in the header connections who will probably partner by the lines that I currently connect to each object to be measured.
  
  
  • Make additional harnesses that interface with the Test System B header pins.
  
  
  • Make a map of derivation using band Council or a similar material to provide header pins to connect the two above custom cables and allow the connection of other elements such as resistors using Terminal level.

  I checked this concept using the Assembly of 176 pins four terminals, like a bunch of little pieces of wire and cable. Are there other issues that I have to configure, such as the elements of a terminal that establish physical components of the switching topologies? The bowels of the PXI-2632 provide more features than the interconnection of the sets of eight sixteen pins? The bowels of the PXI-2630 connect elements that do not allow my proposed scheme?

  I appreciate the suggestions and all entries!

  Thank you

  Jeff Zola

  Hi Jeff,

  First a correction to my previous post: 2632 Terminal has no reed relay protection resistors as I said earlier. The resistance that you were referring to the 2632 and those that I confused, is there to connect the columns of the switch. Resistances have a resistance value zero and act as the electrical connections. The 2632 connects columns c0 to c16, c17 c1, c2 to c18 and so on. Switch cards 2531 and 2532 have the protection relay reed on board resistors.

  As for resistance in the map that protect the reed relays, they are generally very low and do not significatly affect even small tensions that pass through the switch. The resistance won't affect all currents in the map. Any effect that the resistors have on tensions will be with the precision of the switch card specifications.

  Thus, to address the other issue in your post, there is no resistance in the connectors because they are not necessary.

• Acquire more than 2047 samples with the PXI-4461 instaled in SMU-1073

  Hi all, I would ask you for help with the buffer limit.

  I intend to buy digitizer PXI-4461 and he instal in SMU-1073 chassis, namely control via MXI Express of Labview installed on a separate computer.

  What I need:

  -to acquire data of a single channel of AI, but at least a sequence of 20 kS by a acquire task, in some situations until 200kS by a task to acquire.

  The question:

  - I can gain more than 2047 samples in a single sequence, like 200kS, with the PXI-4461 installed in SMU-1073?

  Internal buffer of the PXI-4461 is reserved to 2047 samples. So I'm not sure if Labview can download remotely via MXI Express the data in the buffer of the PXI-4461 via MXI Express fast enough without any affection of the sampling program.

  -in the case, this PXI-4461 with SMU-1073 isn't the right combination, what chassis and a controller can do?

  Thanks much for the reply

  Jan

  It will work for you.

  The on-board buffer 2047-sample is used only as a backup if the flow of data to the PC host (via MXI Express in this case) is not fast enough... that it will be (explained below).  DAQmx transfers data from the buffer of the device to the host PC as fast as he can and, in ideal conditions, should not save the buffer 2047 much at all.

  Let's just say you get 110 MB/s (randomly from a MXI data sheet) flow on your MXI connection.  The 4461 has 2 analog inputs, which will be at 24 bits, we just round 32-bit in case it transfers the data in this way.

  4 bytes/sample (32 bit) x 200,000 s/s x 2 (channels) = 1.6 MB/s, which is well below the 110 MB/s, which will make the MXI link.

  clear as mud?

  Germano-

• Usability is NOR-SCOPE Soft Front Panel for the PXI-5154?

  I am plans to use the PXI-5154 with his NO-SCOPE Soft Front Panel in a product to test instrumentation. Our past experience, our users need an on-board scope that is easy to use which does not load the CPU. In most cases the scope will be used to check a transitional type of pulses. So, the amplitudes and rise times are essential to ensure compliance with ISO standards. The ability to capture, store and recall traces of reports is important, as well as the ability to perform simple and reproducible follow-up measures. We don't expect our users to have to program the scope; "give me the waveform.

  Does anyone have any comments on the usability of the NOR-SCOPE Soft Front Panel? How to compare with other soft scopes?

  Hello!

  The scope Soft Front Panel is very user friendly and able to load/save waveforms, Load/Save settings and make the scalar measures.  I've attached a screenshot of what the front soft worn looks as well as a link to a help document on the high speed digitizer HELP.  Information on the scope Soft Front Panel lies in this document and can be found under the tab content in the configuration tree (NI - Scope Soft Front Panel help).

  Help of digitizer OR high speed

  http://digital.NI.com/manuals.nsf/WebSearch/2123F564C6DE7B27862574DE006915DE

   

• The PXI-8195 system state: not configured

  Dear community,

  at startup time real pc pxi 1042 with a Don t of controller pxi-8195 RT-model start. The display shows the following message is displayed:

  (the doesn´t of pc have an operating system because it is used only for the RT model)

  Transfer of control of user program.

  LabVIEW RT Boot Loader

  (C) copyright 2002-2005 National Instruments Corporation

  LabVIEW time real Single-Core Kernel

  MAX system identification name: not specified

  The initialization of the network...

  Device 1 - MAC address: xx - 0.0.0.0 (primary)

  System status: not configured

  I hope that someone of you can help me

  Hello

  First of all, welcome to the Forum OR!

  You can find a detailed guide of your PXI system with your real-time system configuration here:

  Initial setup of the PXI real-time and install the http://www.ni.com/white-paper/12871/en/ software system

  This screen your see is just a console that returns events on the pxi system. In your case, it indicates your pxi is not configured.

  You cannot create events of keyboard and mouse on a system in real-time because it would mean that your system is not more deterministic.

  For this purpose all the configuration and programming is done on a host pc, which connects to the pxi and deploys your programming.

• The PXI-8512 does support the series 2 filter or a similar mechanism to filter the messages?

  Hello

  I need to buy a couple of cards CAN interfaces for my test application and I wonder what you choose

  I already used a PXI-8461 to obtain data of the customer model under test, and due to the fact that sometimes the client bus can be very busy, but most of the messages is not interesting for my system that I use currently series 2 comparator/mask/filter to filter only the interesting messages.

  Without this filter, the PXI-8461 often returns an error due to overloading of the bus. With the filter, everything works perfectly

  Now I need to implement several testbeds with this same feature, and I plan to move to the new PXI-8512 for new.

  My question is: is the most recent PXI-8512 a device series 2 institutions? Support the filter 2 series or any other mechanism to avoid problems on the busy bus?

  Thank you for your support.

  Kind regards

  Davide

  Hi Davide.

  the PXI-8512 isn't a series 2 device. The PXI-8512 is a device of the X-NET family. X-NET is the technology whose use OR in support of CAN, LIN and FlexRay with a driver API. Series 2 devices use the former NI-CAN driver that only supports the CAN. All of the new devices are devices X-NET.

  Take a look to the following document:

  NI-CAN for NOR-XNET application migration
  http://www.NI.com/white-paper/9717/en

  On this page you will find the following statement for the function that you are already using:

  Transceiver filters were traditionally indicated for applications where only a few CAN IDs have been considered on a bus high load. In some cases, material NI-CAN support the bandwidth of the full bus, which leads to a buffer overflow. The hardware architecture OR XNET uses the engine NOR-XNET DMA-driven to eliminate the occurrence of buffer overflows. CAN of NOR-XNET interfaces are able to handle high load bus and transmitting at the maximum rate without coupling to buffer overrun. If your applications use the hardware filters extensively, NOR recommend setting up CAN opposes, or by reading the bus while using Network Interface objects. The best option for these applications is to modify your code to use the API OR-XNET native.

  Best regards, Stephan

• Memory of the PXI - 6562 Max per channel

  I have two questions.

  I have a PXI - 6562 and a data set is 256 MB (32 MB). I want to send the data in this dataset on a single axis of I/O serial. basically, I would like to spend my little of a set of data at the same time on both edges of the clock on an axis of IO. I don't like on the other IO pins. Is this possible with the PXI-6562 or all bits in each octet in the memory of the card corresponds to a specific channel.

  If I can't send my data in series then I will accept that to encode every bit in my data set in the form of byte with a bit of data and the other zeros. This means that, for a set of data from 256 MB, I would need 8 times more memory 2048b. I understand that there are a total of 2 GB of RAM on the PXI-6562. Is this all addressable RAM in series? I can write the data of all the 2 GB of RAM for say 8 i/o ports?

  gtg811q

  With the PXI-6562 even if you want to only output a channel you must always write in a format of U8. So, as you describe you that a single bit, worries you, and you will need to set to 0 for the rest. This means that all data that you generate will be the value of 256 MB of data, because the smallest unit you can write with the HSDIO driver is the U8.

  Now in regards to moving data on the two edges of both sides of the sample clock, this is called Double flow of data and is available with our devices OR 656 X and 6547 and 6548 devices. We have a developer area which details the DDR option more.

  Advanced features of NOR-HSDIO: Double data rate

  http://zone.NI.com/DevZone/CDA/tut/p/ID/6718

  In reference to the memory of the generation, the width of the data to the memory of the generation is not configurable by the user. This means that if you have the 128 MB / channel option your total memory available per channel is 512 Mbit/channel. Because the width of the generation of data is set to 1 byte, and you get 4 times the memory per channel mode DDR with the 6562. The KB below explains the behavior. Look under the section 'Generation '.

  Width of HSDIO and allowance data memory:

  http://digital.NI.com/public.nsf/allkb/E5170A54988EF81A8625725A006103BB?OpenDocument

  So, in summary, the total of 2 GB memory won't be available for a single channel, but you have a total of 256 MB/channel available for each channel. Since you are really interested in only one channel you will be able to write data from 256 MB to you. As you would put all your data on the memory of the card you have to the flow of the disc on your generator HSDIO card. To do this, we have some examples:

  NOR-HSDIO Stream from disk (generation) using Win32 IO file:

  http://zone.NI.com/DevZone/CDA/EPD/p/ID/5270

  However, there will be a bottle neck on your PXI backplane data, because the basket max transfer rate will be around 100-110 MB/s you will not be able to cope with your generation session. Since you will write in U8s each sample is 1 byte, which means that the best you can hope to stream would be around 100 MHz or more.

  We have not the cards LVDS SMU (PXI Expresss) which would allow you to have a superior data through-put, but if you do not necessarily need the LVDS, we have other options. I'm guessing you need LVDS or you would not the 6562.

  The other option is to write you data in parallel in the 8-bit generation DDR and then use an external serializer for an 8 to 1, then you would be able to use all of the available memory and you would probably be able to fit all your data on the memory of the card and you do not have to stream from the disc. This external serializer allows you to put your first data point on channel 0, second data point on channel 1 and one until you loop around back and have your second sample generated between the way 0 be your 8th overall your waveform data point.

  I hope this helps and let me know if you have follow-up questions. Thank you!

• Difficulties in finding devices on the PXI-1033

  When looking at the measurement and Automation devices explore my NI PXI-7853R and 128Mux (PXI-2532) seems to work very well. However, when you load a project, Labview FPGA the new project wizard displays the error:

  No PXI controller have been found on the network.  Ensure that your PXI controller is correctly configured in MAX and try again.

  dependencies the option 'R series Intelligent DAQ PXI real-time '.

  A similar promblem arises when you use NISwitch, simply, it does not find the PXI-2532 module.

  With labview, I have been able, for example using an example, reassociate the device and managed to compile a race as part of an existing project.

  However, to my knowledge, there is no way to do it with NISwitch.

  I tried to solve the problem by restarting the computer several times. Also tried re-installing the drivers NI Switch as well, with no luck

  Hi Jayem,

  It seems that you have a few different things and possibly multiple systems.  Can you please provide more details about your concerns and your setup (s)?  Where the creation of project FPGA (http://zone.ni.com/devzone/cda/tut/p/id/6358) you receive the error?

• Read the PXI-8431 channels using LabVIEW

  
  

  Hi Marc,

  The examples provided with LabVIEW and DAQmx drivers are very detailed and comprehensive to demonstrate how you can use cards. To join the Finder of the example, start LabVIEW and select help > find examples.

  When you load the example Finder, make sure you browse by task.

  For the programming of DIO:
  Navigate to hardware input and output > DAQmx > digital measurement. There is a few screws. Make sure you look in the list of requirements to see the example works with the PXI-6515.

  You can also visit the following links to learn more about programming DAQmx:
  Getting started with NO-DAQmx
  http://zone.NI.com/DevZone/CDA/tut/p/ID/5434
  Learn 10 functions in NOR-DAQmx and handle 80% of your Applications of Data Acquisition
  http://zone.NI.com/DevZone/CDA/tut/p/ID/2835

  For series programming:
  Navigate to hardware input and output > Serial
  You will find most of the screw example it can be used with the PXI-8431.

  I hope that helps you to get off the ground!

• Change in gain on the PXI-6221

  Hi all

  I apologize in advance for a newbee question. I recently started to work on the measurement of force in the laboratory of fluid mechanics. We got a load cell 3 - axis with 0.5 mV/V, power per channel, which I hung on SG24, which sits on SC-2345, connected to the PXI-6221.

  As far as I understand, after the signal comes out SG24 unit, it is amplified to 500mV and powered to PXI card, which in turn have 4 possible gains of 0.2V, 1V, 5V, 10V. To keep the resolution as fine as possible, I'd be interested take a +/-200mV gain, which in turn cut my signal more then half but keep a resolution ~ 6.1uV, I like not having the range, my forces expected fall shorter reach.

  The problem is that I can't find neither manual or MAX a way how truly change the gain. If I open MAX > NOR-DAQmx devices > PXI-6221, I see no possibility to change the input voltage. I can see +/-10V in the Test Panel, but if I change to +/-200 m it resets at + /-10, after I close and reopen again.

  Can someone help please on this issue?

  Thanks in advance

  Hi Chris,

  You made my day )

  Thanks a bunch!

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