Digital FPGA of entry of the negative voltage

Similar Questions

• Help compare the negative and positive values

  Well guys, I do this example to show you what I mean

  

  With this example, I can get positive and negative numbers in digital

  But for me, the 'negative' mean nothing

  Example:

  If I have "100-200" for me the biggest value is - 200

  But if I compare the values of bouth got 100 as greater value

  I do the same calc for 3 different variables such as A, B, C

  and after that I need to calc whose value is 'more '.

  But my problem is that if I have the values "-350 300-400.

  the largest will be "300", but for me the 'negative' mean nothing

  so I need to the largest value is "-400".

  For all positive values, its works very well!

  I compare A and B, after the highest is on C and have a result!

  but when I have negative and positive values... I had this problem...

  and when I have negative values only I have a problem too.

  '-300-400-500' for me the largest value must be "-500" but labview-watch "300".

  as - 300 is greater than-500 in algebriac.

  And if I use absolute values, I will always have a positive value... but I need to know if the value is positive or negative

  No matter which, can help me with this?

  Thank you

  

  Ben

• The use of pins of status (4 outputs) and data (8 entries) of the parallel port pins at the same time.

  Hi all

  I'm a newbee in labview. As part of my project work, I need to get 8 digital inputs and send 4 digital outputs.so I think to use the Parallel Port on the pc.i can make use of 8 datalines for entries. I found the site NOR is it possible to use status for output pins. But is it possible to use status for output pins pins and data for entries to the time.please help even me also mention of the measures to take, or keep in mind while implementing.also include any example vi that could be useful.

  Thanks in advance

  I would recommed you to NOT use the parallel port. Now a day you have hardly a PC with parallel port. also if you have some old PC then most likely last version of LabVIEW (e.g. 2010) will need a lot more memory RAM and processor.

  If you want a solution very very low cost then I would recommend using an arduino to that effect. You can then download LabVIEW Interface for Arduino and start working.

  If you continue to use the parallel port, then you could try (I haven't worked with parallel port and have not tested the following solutions)

  Download VIPM and then install the enclosed package. It will add the port e/s palette in your labview. and you can use it.

• Geographical address on the device voltage map PXI express

  Members of the forum good day!

  I am designing a PXI express card that must be inserted into a NI PXI express chassis. I read the documentation and specifications PXI, PXI express, of the cPCIexpress, but it seems that I'm not able to find any specification of voltage level for the BC (pins geographical address) that are present in the J4 connector. I need to know at least the input voltage prior to high level connect them to the FPGA that is on board. I'd like to connect a 12 Volt signal directly to a Bank of the FPGA 1.8V. Yes, I know, I can always use a (made with resistors) voltage divider in front of entrances FPGA, but better know the spcifications before conception to design something wrongly, in my view.

  Can someone give a tip?

  Thank you very much

  Emanuele

  A more precise answer to your question: the GA pins are floating or tied to GND.  You are expected to pull up on your Board to what voltage is suitable for your device.

  -Robert

• exit node digital fpga Boolean realtime control

  I have a system where I want to enable / disable a digital output running on FPGA.

  Once I set the Boolean value on my side in real time (which turns out FPGA), I see the output turns on the CRIO, but it flickers on and OFF (do not lock?).   I just want the FPGA to stay as long as the output is enabled, on the coast in real time.  I can't change the mechanical action of the switch because of limitations on FPGA / RT according to labview (I get an error on compilation)

  Any suggestions on how to fix this?

  

  

  tman2013 wrote:

  What I am doing wrong?

  You reset the FPGA inside of the loop, in "Open FPGA Part.vi. You must open the FPGA reference once, outside the loop, instead of open it several times. Whenever you reset the FPGA VI, exits back to the default values.

• FPGA reference questions between the station development and execution? 63195 error code

  I will do my best to describe the problem, I was see.  Note, I tried a few other messages that kind of touch on my problems, but they never seem to have a definitive solution.

  Background-

  I have 3 screws:

  VI 1) opens / runs the bitfile FPGA reference and stores the reference to a global file so that I can call the reference of other screws I need to do this as opposed to the opening of a new reference because I use the FPGA for digital communications and it adds about 100 ms to to open a new reference whenever I need to read/write in the target FPGA to host (100 ms are long in the) digital world!).  Some people use Shift Registers.  I finally called my whole army FPGA screws of TestStand to run a test automated, so it was easier to break up of my functions for open/close/read/write.

  VI 2) called the global reference of the file for FPGA, then going to a read/write node to change the settings of the target, then passes the reference out of the node back to the global reference of the file read/writable

  VI 3) calls close reference FPGA and the function is passed the global reference of the file.

  Question-

  I understand not why this method works fine when I run either of TestStand with station options defined for the development (not running) mode or when I open VI which calls these 3 screws individually in sequential order but IS NOT working when I try to run these screws individually (Run VI 1 - open-> write Ref to the global reference of the file-> Run VI 2 - read global file reference-> playback control function / writing-> error-63195) or when I have run in the same sequence TestStand but together with station for execution options.  Maybe I need to change the TestStand sequence to load all the modules at startup?

  Why the reference becomes lost when global failover between development and execution and why labview cannot drop keep the reference stored?  Is there a work around?

  Finally found a solution.  I do not understand why it is necessary during the reading of the FPGA and not what writing (in fact I do not understand why it worked at all) but I ended up changing the properties of the step in my TestStand sequence for the step calling my DTL_READ.vi to be properties-> Run Options-> Unload Option-> "Unload after executing the step.  That seemed to do the trick to get my test TestStand sequence to work in runtime.

  I still don't understand why this was not required when you run the same sequence in the design environment and why it is not when I call my DTL_WRITE.vi.

  The DTL_READ.vi and the DTL_WRITE.vi pass the parameter labveiw global.vi 'Reference FPGA VI"of a node in read/write.  I don't know if the root of the problem is in my host TestStand and LabView FPGA VI...

  Thanks for all suggestions from you guys!  I'm happy I work but I am still confused by the solution.

• How to read the memory set on FPGA in Application of the RT?

  I use the NI9403 DIO module on chassis cRIO-9111 alongwith cRIO-9024 controller RT.

  I've defined a "Variable" (memory location) of FPGAS which would be written in FPGA VI. The result of the logic generated from the different digital inputs would be recorded in this variable.

  I want to read the value stored in this variable in RT VI.

  What is the procedure/sequence of read this variable in the application of the RT... ?

  You will need to create a KPI for your main FPGA VI front panel and use a loop to write your memory to this indicator.  The indicator can then be read with your RT VI using the FPGA read/write control method.

  The memory of the FPGA is internal to the chip and cannot be accessed from the outside of the FPGA code.

• How to properly connect USB-6251 to measure the DC voltage

  Hi all

  I have a problem as in the http://forums.ni.com/ni/board/message?board.id=170&message.id=404676&query.id=250408section.

  I'm sorry for the repetition of the subject, but I read all your advice and have not yet solved the problem.

  My task very simply: I use USB-6251, differential mode to measure the voltage of the battery (Energizer) 1, 5V (I connect AI0 pole positive and AI8 to the negative pole). But result shows > 10V and Mean.vi shows greater 4V (see attached photo).

  I do not understand what happed with my task?

  Please help me!

  Thank you very much!

  MC

  You have a floating signal source. Have you connected resistances to remove polarisation currents? Look at Table 1 at this link and make sure that you connect the wires in this way:

  Wiring and considerations of noise for analog signals

  You mention that you use differential channel AI0 again I can see that you measure AI4 on your façade. Have you tested the Max connection? Are what kind of reading you there? Don't forget to select the continuous Acquisition and acquire 100 samples to 1000 Hz. display a snapshot of the reading you get there.

• Can we have two different FPGA refernce running in the same VI

  Hello

  I had developed an FPGA VI, which was the code of the analog input and analog output, and digital output in a single while loop, and an another loop while a small can program the FPGA VI reference is called RT VI to send commands and receive the data.

  I am facing a problem here, all modules except CAN work, no data is received the box when I do loopback {CAN0 and CAN1}

  I plugged in my COmpact RIO module in the series C-NOR-9853.

  Few questions,

  1. can we have two module CAN and analog & digital modules in the same VI?

  2 suppose that IF I create 2 FPGA VI, can I call the two VI FPGA in the same VI RT?

  3. can we have 2 different RT VI in the same project?

  4. how to generate an application when RT VI and VI FPGA are involved?

  Thanks in advance

  Rohith M P

  
  

• Stuck in the stage Listener entry in the DOUBLE OF RAC databases

  I'm trying to reproduce a new db production db RAC RAC with RMAN.
  
  I'm done with the following steps:
  (1) prod backup database with rman
  (2) copy init file and entries to not taking into account parameters of rac...
  (3) create a password for the new db file
  now, I'm stuck at step 4) create a static Earphone for your new database and reload the listener as the case may be.
  This step is necessary because a double RMAN uses an auxiliary database which lies in no Assembly and therefore will not automatically register with the other as specified by local_listener, remote_listener and or by default, 1521.
  
  For example:
  
  (SID_DESC =
  (GLOBAL_DBNAME = rman.colestock.test)
  (ORACLE_HOME = u03/app/oracle/product/db/10.2)
  (SID_NAME = rman2)
  )
  
  The foregoing is digital, that I got.
  
  However I'm very confused here:
  First of all, on the RAC server, I added entry sid at the bottom of the listener.ora. and the tnsnames entry looks like this:
  ABC =
  (DESCRIPTION =
  (ADDRESS_LIST =
  (ADDRESS = (PROTOCOL = TCP (PORT = 1528))(HOST = xxxxxx76))
  (ADDRESS = (PROTOCOL = TCP) (HOST = xxxxxx 77)(PORT = 1528))
  )
  (CONNECT_DATA =
  (SERVICE_NAME = abc_service)
  )
  )
  
  How can I add a sid entry in the tnsnames.ora file? Since I assumed first, create a single database not cars, what do I have to place name service_name or sid?
  
  Another confusion is how to charge the listener? Since it is a RAC server, two nodes has two listenrs: abc_listener1, abc_listener2. I have to stop and start listner by svrctl stop the dynamic listener?
  
  Please if you can, provide the procedure detailed here how create static listener tnsnames entry and entry of listener on a CCR environment and then reload the listener.
  
  I have to finish the duplication of this weekend. So, any help will be greatly appreciated.
  
  Thank you in advance.

  user569151 wrote:
  I'm trying to reproduce a new db production db RAC RAC with RMAN.

  I'm done with the following steps:
  (1) prod backup database with rman
  (2) copy init file and entries to not taking into account parameters of rac...
  (3) create a password for the new db file
  now, I'm stuck at step 4) create a static Earphone for your new database and reload the listener as the case may be.
  This step is necessary because a double RMAN uses an auxiliary database which lies in no Assembly and therefore will not automatically register with the other as specified by local_listener, remote_listener and or by default, 1521.

  For example:

  (SID_DESC =
  (GLOBAL_DBNAME = rman.colestock.test)
  (ORACLE_HOME = u03/app/oracle/product/db/10.2)
  (SID_NAME = rman2)
  )

  The foregoing is digital, that I got.

  However I'm very confused here:
  First of all, on the RAC server, I added entry sid at the bottom of the listener.ora. and the tnsnames entry looks like this:
  ABC =
  (DESCRIPTION =
  (ADDRESS_LIST =
  (ADDRESS = (PROTOCOL = TCP (PORT = 1528))(HOST = xxxxxx76))
  (ADDRESS = (PROTOCOL = TCP) (HOST = xxxxxx 77)(PORT = 1528))
  )
  (CONNECT_DATA =
  (SERVICE_NAME = abc_service)
  )
  )

  How can I add a sid entry in the tnsnames.ora file? Since I assumed first, create a single database not cars, what do I have to place name service_name or sid?

  Another confusion is how to charge the listener? Since it is a RAC server, two nodes has two listenrs: abc_listener1, abc_listener2. I have to stop and start listner by svrctl stop the dynamic listener?

  Please if you can, provide the procedure detailed here how create static listener in tnsnames entry and

  tnsnames.ora contains no information on the listener.

  entry of listener on a CCR environment and then reload the listener.

  http://www.lmgtfy.com/?q=Oracle+LOCAL_LISTENER

• CS3 greyed out entries in the file menu sub; Cross-media export

  InDesign CS3 5.0.4 - OS10.5.8

  Greyed out entries from the file menu sub; Cross-media export > XHTML / Dreamweaver / XHTML / Digital Editions

  Please can someone shed light on this problem?

  Have you tried to replace your preferences? Replacement of the InDesign preferences

• Remove the entries in the playlist.

  I can't get rid of unwanted entries in the playlist.  There is no x in the top right and the items won't slide.  I'm on Yosemite 10.10.5

  Highlight the item in the playlist column.  Hold down the CTRL key.  Click on the item and options pop up.  Select remove the element.  Yes I know.  Why they have just under the X in the corner?

• Application server: duplicate entries for the same machine in the screen "select a Mac".

  The application Sever on one of my computers has several duplicate entries in the initial screen "choose a Mac" that appears just after the launch of the application server where you choose the particular Mac which you want to connect.

  My server is in the local IP 10.0.0.5, but there are two entries for it in the list for a reason any, as you can see here:

  

  I can choose is entered to connect without a problem. They seem to be legitimate duplicates. So I would like to remove one of them.

  Does anyone know where these entries are stored in the file system, or how to remove one of them in the list?

  You can manually edit the plist, or simply remove to rebuild the entire list:

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• Change the source of entry with the Caps Lock key does not

  It should be possible to change the input source with the Caps Lock key on macOS Sierra.

  and I checked "Toggle ABC of input source with caps lock shift" in system preferences > keyboard > input Source.

  However, it does not lock shift still only works as long as CapsLock

  I tried to reboot, reset the keyboard shortcuts, deactivation of Siri, reset NVRAM and reset the SMC, but still does not.

  I use only the default input source and have not installed and related programs to the keyboard or input source.

  Can anyone help?

  Thanks in advance.

  Greetings slwsbl!

  Thank you for using communities of Apple Support.

  I see that you want to change the input source with the SHIFT key on macOS Sierra. I understand the importance of wanting to use a specific key when changing inputs. I'm happy to help you with this.

  It is possible to do. Please take a look at the User Guide helps Mac, specifically, this section:
  
  

  Switch between input sources

  To switch between input sources, do one of the following:

  • Use the menu entry: Click on the menu entry in the menu bar, and then choose the input source. If an input source is dimmed, the current application does not support it.

  • Use the Caps Lock key: Press the caps lock shift key to switch between a non-Latin input (such as the Chinese or Korean) source and an input source Latin (for example, French or English).

    To use this method, you must select the option "use Caps Lock to toggle to and from" in the stream of input methods. Choose the Apple menu > System Preferences, click keyboard, and then click input methods.

  • Use keyboard shortcuts: Press control-Option-space bar to select the source of the following entry in the menu entry, or control-space to select the previous input source.

  Best regards.

• do not take into account the negative numbers

  I have a column of numbers I would like to add, but I want only to add positive numbers and ignore the negative numbers. How to do?

  I suggest that you use SUMIF.

  

  The result I got for this formula was 11... -4 was NOT included in the SUM