exit node digital fpga Boolean realtime control

I have a system where I want to enable / disable a digital output running on FPGA.

Once I set the Boolean value on my side in real time (which turns out FPGA), I see the output turns on the CRIO, but it flickers on and OFF (do not lock?).   I just want the FPGA to stay as long as the output is enabled, on the coast in real time.  I can't change the mechanical action of the switch because of limitations on FPGA / RT according to labview (I get an error on compilation)

Any suggestions on how to fix this?

tman2013 wrote:

What I am doing wrong?

You reset the FPGA inside of the loop, in "Open FPGA Part.vi. You must open the FPGA reference once, outside the loop, instead of open it several times. Whenever you reset the FPGA VI, exits back to the default values.

Tags: NI Software

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