Module Design triple redundancy

Hello

Someone has already tried to implement "Triple Module redundancy" on a map of FPGA? I have a PXI-7853R. I think I can support than a bit file. Yes, I could write three modules in a single bit file, but then, how do I control where on the FPGA would be built on each module.

Any ideas?

Thank you!

I recently had a similar requirement. I just dropped 2 coppies double redundancy knowing they could be compiled twice but I had no control on where they have been compiled in. However, I found I could identify the IO pins and at least have the e/s of my redundant logic located in various locations through research in the file ucf for the fpga (who is with the labview fpga installation) and the xylinx fpga datasheet. I hope it's at least some use for you. Good luck.
Michael

Tags: NI Software

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