read or write to the fpga of e/s node

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• TCP Read and Write at the same time

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• Questions about serial port read and write at the same time

  Hi I create a user interface for the communication serial port, where there are essentially 2 front panels, where the user enters commands one and the other where the prints of UART is delivered. I thought initially using a state machine but the reading and writing may be independent sometimes and so I can't rely on States. I searched a bit on the forum and he left me even more confused. Help, please.

  (1) in a thread that sessions visa duplicated has been used for writing and reading at the same time, is it recommendable? How will this affect performance?

  (2) essentially when the vi is reading data are it must constantly view as well, however, someone said that it takes too much memory to use shift registers, so how do I go about this? If using a State in queue after the loop of reading it affects the playback loop and be sequential?

  In addition anyway is to move the cursor to the latest data from the indicator

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  (4) according to my understand the expectation for the event do not monopolize resources and writing can go in parallel, am I right?

  Thank you. I have attached a very basic vi which took me to the point, but I want to make it more robust. Please help especially in the part of the user interface.

  su_a,

  (1) you can have only one session to a port. Several UART can handle full duplex so performance is not affected.  At flow rates of high data and large amounts of data, buffering and latencies of BONE can become a problem.

  (2) who told you that shift registers using too much memory? Shift registers are usually the best way to transfer data from one iteration to another. String concatenation inside a loop (registry to offset or not) causes the chain to develop and may require re-allocation of memory.  Your VI never clears the string so its cold length become very large.

  Generally, you do not have an active cursor on an indicator.  If you want to always display the most recently received characters and turn on the vertical scroll bar use a property node to keep scrolls to the bottom.  This can be annoying for users if they attempt to manually move the scroll bar and find that the program continues to move it back automatically.

  (3) if the user has changed the value in the chain of command, when he hits enter the modified value event fires.  Simply strike brace does not change the value and does not trigger the event.  Not control need to be erased, but the value that he has to change.  If you want to send the same command again, have a button send a command may be a better choice.

  (4) write is a case of the event.  It is not in parallel with anything.  The structure of the event do not monopolize resources.  The other loop will run while it waits.

  The event loop will not stop when you press the STOP button. Probably it wll take two command: change events of value after JUDGMENT before any loop stops.  Replace the Timeout event (which never expires) with a STOP: value change event and a real wire of this judgment to the Terminal endpoint.  Remove the local variable.  Make mechanical locking when released.

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• Read and write to the local XML file

  Hello

  I'm trying to understand how to use the xml files saved locally. My goal is to create an xml file in the repository of the application (which has read/write permissions), add data in this file xml and re - register so that it can be retrieved whenever this is necessary.

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      x
      x
      x
      x
      x
      x
      x
      x
      x
      x
  
  
  
  ...etc.
  

  I read a few articles about recording and writing in a file like this, but none of them does not seem to work. I hope someone could provide me with the code to do this.

  Thank you.

  Try:

  ///////////////////////////////////////////////////////////////////////

  public public static function Store (name: String, data: String): void

  {

  var file: file = File.applicationStorageDirectory.resolvePath (name);

  var file_stream: FileStream = newFileStream();

  file_stream. Open (file, FileMode.WRITE);

  out of the var : String = '\n';

  output of +=;

  output = output.replace (\n/g, File.lineEnding);

  file_stream.writeUTFBytes (output);

  file_stream. Close();

  }

  //////////////////////////////////////////////////////////////////////////

  public public static function Get (name: String): XML

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  var config: XML = null;

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    if (file.exists)

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• Need help: UTL_FILE read and write in the text file

  Hello, I'm on version 11 GR 2 by using the UTL_FILE function to read a text file and then write the lines where it starts with the word "foo" and put an end to my writing in the text file where the line with the word "ZEN". Now I have several lines that begin with 'foo' and 'ZEN' allow a paragraph, and in this paragraph, there is a line that begins with "DE4.2". Therefore,.
  I need to write all of the paragraphs that include the "DE4.2" line in their beginning and end of lines 'foo' and 'ZEN '.
  
  FOR EXAMPLE:
  
  FOO/234E53LLID
  IT'S MY SECOND LINE
  IT'S MY THIRD LINE
  DE4.2 IT OF MY FOURTH LINE
  IT'S MY FIFTH LINE
  ZEN/DING3434343
  
  FOO/234E53LLID
  IT'S MY SECOND LINE
  IT'S MY THIRD LINE
  IT'S MY FIFTH LINE
  ZEN/DING3434343
  
  I'm only interested in writing the first paragraph tha includes line DE4.2 in one of the paragraph of lines not the second ther that does not include the "DE4.2".
  
  Here is my code so far:
  
  CREATE OR REPLACE PROCEDURE my_app2 IS
  Utl_file.file_type INFILE;
  outfile utl_file.file_type;
  buffer VARCHAR2 (30000);
  b_paragraph_started BOOLEAN: = FALSE; -flag to indicate which required paragraph is started
  
  BEGIN
  -Open a file to read
  INFILE: = utl_file.fopen ('TEST_DIR', 'mytst.txt', 'r');
  -Opens a file for writing
  outfile: = utl_file.fopen ('TEST_DIR', "Out.txt", "w");
  
  -Check the file is open
  IF utl_file.is_open (infile)
  THEN
  -lines in the file in loop
  LOOP
  BEGIN
  UTL_FILE.get_line (infile, buffer);
  APPLICATION STARTING POINT-
  Buffer IF LIKE 'foo %' THEN
  b_paragraph_started: = TRUE;
  END IF;
  -SEARCH FOR GRADS APPS
  IF b_paragraph_started AND buffering LIKE '% 4% ' THEN
  UTL_FILE.put_line (outfile, buffer, FALSE);
  END IF;
  -REQUEST FOR ENDPOINT
  Buffer IF LIKE '% ZEN' THEN
  b_paragraph_started: = FALSE;
  END IF;
  UTL_FILE.fflush (outfile);
  
  EXCEPTION
  WHEN no_data_found THEN
  EXIT;
  END;
  END LOOP;
  END IF;
  UTL_FILE.fclose (INFILE);
  UTL_FILE.fclose (outfile);
  EXCEPTION
  WHILE OTHERS THEN
  raise_application_error ("-20099, ' UTL_FILE unknown error");
  END my_app2;
  /
  
  When I run this code I get only one line: DE4.2 it ME LACK THE WHOLE PARAGRAPH
  
  PLEASE ADVISE...

  I agree with reservations of Justin on the length of a "paragraph" and the number of users that are running at the same time, so here is a version without the collections.

  CREATE or replace PROCEDURE my_app2 IS
     infile utl_file.file_type;
     outfile utl_file.file_type;
     buffer VARCHAR2(30000);
     b_paragraph_started BOOLEAN := FALSE; -- flag to indicate that required paragraph is started
     b_toprint BOOLEAN := FALSE;
     l_para_start pls_integer;  -- start of "paragraph"
  BEGIN
     infile := utl_file.fopen('TEST_DIR', 'mytst.txt', 'r');
     outfile := utl_file.fopen('TEST_DIR', 'out.txt', 'w');
     LOOP
        BEGIN
           utl_file.get_line(infile, buffer);
           IF buffer LIKE 'FOO%' THEN
              b_paragraph_started := TRUE;
              l_para_start := UTL_FILE.FGETPOS(infile) - (length(buffer) + 1);
           END IF;
           IF b_paragraph_started and buffer like '%DE4%' THEN
              b_toprint := TRUE;
           END IF;
           If buffer like 'ZEN%' THEN
              IF b_toprint THEN
                 UTL_FILE.FSEEK(infile, l_para_start);
                 utl_file.get_line(infile, buffer);
                 while buffer not like 'ZEN%' loop
                    utl_file.put_line(outfile,buffer, FALSE);
                    utl_file.get_line(infile, buffer);
                 end loop;
                 utl_file.put_line(outfile,buffer, FALSE);
              end if;
              b_paragraph_started := FALSE;
              b_toprint := false;
              utl_file.fflush(outfile);
           end if;
        EXCEPTION
           WHEN no_data_found THEN
              EXIT;
           END;
     END LOOP;
     utl_file.fclose(infile);
     utl_file.fclose(outfile);
  END my_app2;
  

  Test:

  SQL> !cat mytst.txt
  FOO/234E53LLID
  THIS IS MY SECOND LINE
  THIS IS MY THIRD LINE
  DE4.2 THIS IS MY FOURTH LINE
  THIS IS MY FIFTH LINE
  ZEN/DING3434343
  
  FOO/234E53LLID
  THIS IS MY SECOND LINE
  THIS IS MY THIRD LINE
  THIS IS MY FIFTH LINE
  ZEN/DING3434343
  
  FOO/234E53LLID again
  THIS IS MY second SECOND LINE
  THIS IS MY second THIRD LINE
  DE4.2 THIS IS MY second FOURTH LINE
  THIS IS MY second FIFTH LINE
  ZEN/DING3434343 again
  
  SQL> exec my_app2;
  
  PL/SQL procedure successfully completed.
  
  SQL> !cat out.txt
  FOO/234E53LLID
  THIS IS MY SECOND LINE
  THIS IS MY THIRD LINE
  DE4.2 THIS IS MY FOURTH LINE
  THIS IS MY FIFTH LINE
  ZEN/DING3434343
  FOO/234E53LLID again
  THIS IS MY second SECOND LINE
  THIS IS MY second THIRD LINE
  DE4.2 THIS IS MY second FOURTH LINE
  THIS IS MY second FIFTH LINE
  ZEN/DING3434343 again
  

  You may need to change the length (buffer) + 1 depending on your platform and if you want a blank line s NLE out paragraphs, add another call to put_line after that outside of the loop in the fi l_toprint block.

  John

• How to use the two counters to PXI-6280, to read and write at the same time?

  Hi all

  I try to use PXI-6280 counter to generate a command of step motor pulse train.  The idea is to send a number done and known pulse for the engine, which belongs to a system XYZ. The point is, if, at some point, the user or the security system can interrupt the movement. If this happens (and will be... a lot), I will lose the real position, because I don't know how many pulses were actually sent to the engine. That is why I want to use the other cost to count impulses how were actually sent to the engine. I can start any tasks (generating or account), but only the first started task will operate. I met a couple of mistakes and I'm not able to find a solution.

  Is it really possible to use the two counters? I've already done this in a pci system and worked without problems.

  Thanks in advance,

  Giavonna

  Electrical engineer

  I'm afraid that I don't understand your idea. Could explain you better?

  Material of the series M support pointing to an arbitrary digital signals at rates (the clock must be provided from another source, for example a counter).  If you want a digital pulse train finished output and have access to a counter (the two counters if find you another source for your clock, for example the subsystem "output frequency"), you must use this subsystem 'digital output' rather than the output of the counter.  There should be examples in the finder of the example shows how to configure a finished task of digital output.

  Now I'm generating sample clock having a single Timed material Point (the only mode accepts this mode), and configure the counter with finite samples.

  I don't think not just single point NI the hardware, that's what you want.  More commonly, output meter tasks use timing 'Implied', where the release date is implicitly determined by the characteristics of the pulse user-defined.

  Is there a way to stop the production of only one meter when a finite number of pulses has been played in another counter?

  Yes, but it's a little tricky.  You can set a trigger 'Pause' on the output task, with the soruce the break being the internal release of the counter used for the task of entry.  Set the initial value of the counter of entry to 2 ^ 32-N (or maybe 2 ^ 32-1-N, I don't have a system right now to check) where N is the desired number of pulse output.  Together the counter event behavior for the counter edges of County switch output (this is a property of DAQmx export Signal).  When the counter of entry reaches terminal, its in-house production switches, causing thus the task of output to pause.  You can then stop the task in the software (you should be able to use the output of the task of entry counter event to signal to the software when the output is paused).

  Now that I've written that the whole paragraph, I remember something * similar * to work around a limitation of the driver here .  It is not quite the same implementation I described above, but really, you can use a meter output or a counter entry to get the same effect (it could be a good place to start anyway if you want to try this).

  Is there a way to read pulses them how have been generated, without the other counter, counting impulses?

  N °

  Best regards

• Effective use of the FPGA read/write

  I am writing an application for a CompactRIO real-time and I am looking for ways to simplify my code and reduce the CPU usage. I use FPGA to do much CAN e-mail and signal processing, then I have a VI running on the real-time processor that reads values in the FPGA, does some processing and outputs data in the FPGA. My code running on real-time parallel uses several loops running in a master/slave architecture. A single loop reads all necessary information in the FPGA in indicators and writes the values of the controls in the FPGA. The other loops read entries and manipulate the outputs via local variables.

  My question if it would be more effective to get rid of the loop which is dedicated to the communication of FPGA and has of each loop to read and write directly on the FPGA. If I use a reference block FPGA open and use the reference of the output in several loops, each read/write operation block others until it's over? Each output is changed only in one place in the code, but there are several entries that are used by multiple loops. It is even more effective for each loop of read/write for the FPGA on request? How will this affect determinism?

  Thank you

  Jon

  Jon,

  Read/write controls is not deterministic, but I think that your previous method should work just fine, as long as you have that unique writers. If you have multiple writers, you start affected by race conditions.

  I don't think you will see a significant improvement in the performance/CPU in the alternative method. You would see big performance gains if your master loop reads more slowly indeed, but it's always a compromise.

• How to read and write attributes using the API?

  I'm trying attributes of access (read and write) of the following:

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  Sequence

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  When you look at the documentation of the API, TestStand, the following functions are available:

  PropertyObject

  Properties

  Attributes (read-only)

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  Methods

  DisplayAttributesDialog

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  I can't find the following information in the TestStand API:

  1. Where the attributes are stored in a property object?
  
  
  2. How can we access through the API?

  No advice and no information is appreciated!

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• Unable to read / write in the NFS data store

  Hi all
  I'm having a problem with a NFS datastore in Vcenter. I have an NFS share on a Win2k3 server which I am able to mount. However... I can't write him even though the permissions appear to be correct.  This server is connected to an array of training Vault EVA Storage with 2 TB of storage.
  Looks like he's not more as when I try to mount ad content, it shows as 0.00 B ability... and I know that there are files in the NFS data store. Same Host, I can mount my other NFS datastore successfully since a 2008 Server, just do not know which cannot be configured correctly here.

  Help, please... been at this for 2 days banging my head on my desk!

  Screenshots are attached. If there are log files that I could post that would help, please let me know and I'll join them as well.
  Thank you!

  Woot! It worked. I changed the local article, but then authorized security strategy anonymous access with the 2 GID and UID - 2. Once this is done, it is now properly show in Vcenter and allow me to read and write in the data store. Before that I got the value 0.0 even with security policy, change that did not work. So I hope that this issue helps someone in the future, and they do not have a hair pulling experience like I did.

  WHAT A PAIN!

  in any case, thank you all for your time.

• Transmission of data to the host of RT to the FPGA via DMA FIFO

  Hello

  I try to write data from a host of RT on target FPGA using DMA FIFO and then process these data and read then return of the FPGA target to the host of the CR through an another DMA FIFO. I'm working on the NI SMU chassis 1062 q, with the built-in NI SMU-8130 RT controller and target FPGA NI SMU-7965R.

  The problem I face is that I want to send three different tables, two of the same size and the third with different size, and I need one more small to be sent first to the FPGA. I tried to use encode dish with two executives in the FPGA VI. In the first image, I read and write the first table in a while loop which is finite (that is, a finite number of iterations). The second frame contains the process of reading and writing the second two tables (of the same size) in a while loop that can be finite or infinite (depending on a control). The problem is that it does not work. 2 arrays are displayed on the front panel of the RT VI host and works well, however, the table that should have been read in the first sequence does not appear on the front panel of the RT VI host. It is not sensible because if it is not passed from the host to the fpga and vice versa then the second image should not have been executed. Note that I'm wiring (-1) for the time-out period to block the while loop iterations until the passage of each item is completed. So the first while loop has only 3 iterations. Could someone help me undersdtand why this happens and how to fix this?

  I enclose a picture of the host and the fpga vi.

  Thank you.

  If you vote for my idea here and it is implemented, you can even omit the loop FOR fully.

  (I also propose the RE / IM divided inside the loop FOR and perform operations on complex table before the loop the transpose and reshape .) In this way, you only need one instance of these operations. You might even save some unnecessary allocations table in this way)

• Frequency of calls to control for the FPGA read/write

  Hello

  I use a cRIO-9076 with a module NI 9476 DO spend some faucets. It is sometimes necessary for faucets with a pulse time down to a few ms of impulse.

  The FPGA VI Gets the power tap queries, executes a logic of security, and routes the numerical results for the exits. It gets applications power of the VI on RT target that uses the function ' Read/write FPGA control' interaction programming of the FPGA VI front. The loop on the RT runs with 1 kHz, no iteration is missed. That means, it should be possible to switch the valves with a resolution of 1 ms.

  What I see on an oscilloscope, is that the output digital are high for multiples of 50 ms, the system does not reach the valve for example 80 ms pulse or pulses shorter than Ms. 50 is a kind of limitation for calls of "FPGA read/write control"? I tried both options for arbitration, but it does not help.

  The best knowledge of the limiting cRIO/module/features or ideas? Thank you in advance.

  Karsten

  Hi Karsten

  You use any time in your FPGA VI?

  It is useful to your code by sending as an attachment so that I can have a look.

  Kind regards

• Number of DMA FIFO of items to read mismatch in the FPGA and RT

  Hi all

  I use myRIO, LV14 to run my application.

  Request: I have to continuously acquire data via FPGA and host RT process once every 2000 samples are taken. I use DMA FIFO (size 8191) to acquire data, use timeout property in the FPGA to eliminate the buffer overflow. I had followed cRIOdevguide to implement this part. An excerpt of what I put in place is attached. All code runs in the SCTL at 50 MHz.

  Question: Two or three times I met with this strange behavior, the FPGA FIFO gives continous timeout and the RT is unable to read the FIFO. The number of elements to set the property in the FPGA VI gives 0 showing that FIFO is full and no more can be written, but the RT, remaining items gives 0, so it is reading 0 (none) elements.

  Solution: I put a case where I'll write to FIFO (under the code) and if the number of elements to write is different from zero. It seems to work fine, from now.

  What confuses me, is that my FPGA VI said that FIFO is full (number of items to write 0 = FIFO) and gives a timeout error, but RT VI said that number of items remaining in the FIFO is 0 and therefore no data is read. No idea why this is so? My RT and FPGA VIs continues to run, but with no gains or to read data.

  A few minutes after you run the code, I've seen this behavior. No idea why this happens? I try to reproduce the behavior, and will update if I meet with her again. Sorry, I can't post my code here, but I guess the code snippets to explain some extend.

  Thank you

  Arya

  Edit: Even with the mentioned workaround solution, the problem persists, now that the FPGA written any of FIFO. And the RT VI is not able to read all the elements he sees 0 items in the FIFO. The FIFO continues to be in a State of timeout. So I guess that the problem is on the side of RT.

  Why it looks like you read from the FIFO even in two different places in the same VI, at the same time? If the lower reading throws the FIFO, it will never trigger the reset, which could lead to the situation you describe, I think (it's hard to tell from a few screenshots).

  Also, your logic seems too complicated. I immediately noticed that there is no reason to select the entry, the output of = 0 - simply use the 'equal to zero' output directly. On the side of FPGA, why you need check the number of items that you want to write? There's nothing wrong with writing in a FIFO that is already full. just the data won't get written.