SIT of timing

Hi all

I use the SIT toolkit. My host VI is on my desktop, and I download the template for a PXI-8101 where there is an FPGA card.

Most of the time, the model works well. However, sometimes, I get what seems to be a delay. I need my model give me an output every 10ms which must be sent through the FPGA card every 10ms. How can I know if:

(1) I put my model either running all 10ms

(2) my Loop.vi Base_Rate actually closes the loop in 10 ms or less, and it does not work too

Thank you.

Bladhart-

You need to evaluate your code in LabVIEW Real-time to see how long it is taken:

http://zone.NI.com/reference/en-XX/help/370622H-01/lvrtbestpractices/rt_bp_benchmarking/

http://zone.NI.com/DevZone/CDA/EPD/p/ID/5439

A very good example is in the viewfinder for example LabVIEW > toolkits and modules > real-time > benchmarking

I hope that this gets you going

Tags: NI Software

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