Delay UDP

Hello world

I'm developing a few screws to talk to an FPGA via ethernet using UDP packets.

The end screws work: I can write to the Board of Directors and reread from it but there is a delay of about 5 seconds between when the packet is sent from the card to the PC (Windows 7 Enterprise, Labview 2009) and when the labview code he actually shows.

To be more precise, the PC has two ethernet cards: one connected to the internal network and the internet, while the second has a fixed IP (192.168.0.100) one is connected directly to the FPGA.

If I use the first map of the communication is normal, no delay.

If I use the other, the PC sends the request, the FPGA replyes, but then ago a few seconds before Labview will show me the value (and terminate the Executive of VI).

Note that if I use a python script to communicate with the FPGA using the second card, communication is fast, so I suspect a reason any Labview is "shocked" by the fact that the UPD packets are "non-standard." Does anyone have experience with something similar?

Thanks in advance.

Set the "Dot Notation" input of 'IP to the string' true.  It is the function that causes your delay.  When you use the fixed IP address, directly connected to the FPGA, it there is no name associated with the address domain, so Research expects and eventually times out.  This time is the time that you see.  "Dot notation" true will ignore the search for domain name and IP address to return the string.

Tags: NI Software

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