Number of cycles Express VI outputs '0' on target with simulated FPGA of e/s

When I set my target to "Run VI on it development with simulated i/o", the number of cycles to screw all the outputs ' 0 whenever they perform. How can I do a count up (in the case of "ticks") or a timestamp that is appropriate (in the case of "ms") the output?

In fact it does not work as expected. I apologize. When in mode [ms] he ran if slowly as my test that bolt looked like they were defective and I did not notice the value incrmenting when I probed it. I changed the test to use the [ms] instance when running on the FPGA and the [ticks] instance during execution with simulated IO. This looks like it gives 1 tick every "" millisecond"simulated" when simulating and now operate my well tests.

Thank you very much for the help. Sorry again for the false report.

Tags: NI Software

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