shared Subvi FPGA, variable functions

Hello

I want to create a new FPGA project, there will be main.vi and subVIs. The point is, subVIs include loops and waiting for a button click on by user (step controller RT) to perform their task... I tried to use global variables, but I think that it s not working do not... Because the button not Exchange carried out by subVIs... I realized when I changed a few global Boolean variables on subVIs FPGA, I couldn't have the same effect on the front of controller RT...

What should recommend me to use shared variables, can be controlled through, subVIs RT controller, screw FPGA, FPGA...

Best regards...

Do I understand correctly that you ary tries to use a global variable to Exchange data between RT and FPGA? It will not work. Global variables don't work within the scope of an application, the host, RT or FPGA, but not between them. To Exchange data between RT and FPGA, you need to use ' Read/write control' in the FPGA palette or use DMA.

You can use global variables to share data between the main VI FPGA and SubVIs or just different loops on the FPGA.

Tags: NI Software

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