Time Division Multiplexing (TDM) Using USRP s 2943 with synchronization

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  ==================================================================

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  error int = 0;
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  int eventCtrl;
  int panelHandle;
  unsigned int Count = 0;
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  ==================================

  #include

  #ifdef __cplusplus
  extern "C" {}
  #endif

  #define PANEL 1
  #define PANEL_Counter 2
  #define PANEL_Add 3
  #define PANEL_LED 4
  #define PANEL_TIMER 5

  #ifdef __cplusplus
  }
  #endif

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• Jitter in response to signal generator of digital dashboard by using trigger nor tclk with digitizer

  I've written a VI that uses NEITHER tclk to synchronize a generator (PXI-5422 named FGEN1) and a digitizer (PXI-5122 named DIGITIZER1).  There is also a clock card TIMING3 generating a digital camera.

  It seems that can probably be explained by the way TCLK to synchronize, but I don't understand all the details.  Could someone help explain this to me?

  You are right. NOR-TClk ensures that all synchronized devices start at almost at the same time, to the same sample clock, with timing very tight. Sometimes, the level of synchronization with the devices OR TClk-synchronized beats at the level of the synchronization of the instruments of some competitor channels in the same device. But this is not free, there are compromises and added additional jitter for trigger response time is one of them. Here is an attempt to explain why:

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  When you use NEITHER-TClk, several things happen: all devices are locked on the PXI_Clk10 signal to eliminate drift. The device clocks are then adjusted to a period level secondary clock. Very very tight. Then a clock signal common, slower called TClk is produced inside the devices. All the generation of trigger are delayed to be sent to the next rising edge TClk, and all consumption trigger is delayed to be received at the next front descending TClk. This way you make sure that propagation delays don't mean one of the devices does not react to the trigger until the next clock cycle.

  That's why you see jitter above the reaction time of relaxation. When you add devices with different clock settings, so the frequency of the TClk can be slower for a divisible frequency in the device clock frequencies everything is possible. This causes the trigger jitter of reaction time be even slower!

  I hope this helps you understand what you see.