Timed while loop speed?

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• What happens when DAQmx - searches read more timed period loop?

  Hi all!

  I'm not sure how Labview manages the following situation:

  I have a loop that is timed with a period of 1000 m, it is configured to ignore the lost iterations and keep the initial phase. I created a task that needs to be read continuously at a frequency of 1 kHz. In the timed loop, there are the DAQmx - read function (analog signal, 1 channel, N samples)

  Now, if I put the number of samples per channel at 1500 for example (while it takes 1500 * 1 ms = 1500 ms > timed_loop_period to read), I noticed that the timed loop takes ~ 1500 ms to complete. The same phenomenon occurs with any other number greater than the period of the loop.

  This means that the period of the loop passes to 1500 ms? Or something different?

  Thank you!

  Best wishes

  Samuel Lopez Santamaria

  You go winding with an iteration of the loop of 2000 msec.

  An iteration of the loop will always be until he has to do.  If you tell him to keep the first phase and it works for a long time, then it will wait until the next 1000 msec happen before going to the next iteration of the loop.

  Now with your situation, later iterations cannot take it any longer.  If you are permanently data acquisition, DAQ mx buffer fills while the loop is still pending.  So when he runs again, there may already be 500 msec value of data in the buffer, and he just needs to wait another 1000 ms up to what you have acquired the total of 1500 milliseconds of data you have requested.

  The situation for the third iteration of the loop will depend on whether the other was done within the 1000 msec, or ran just a bit long.  It behaves more like the first iteration, or the 2nd iteration.

  My question is why you use it timed while loop?  What characteristic of it you need that a regular while loop is not?  I think that mixing and matching the characteristics of a timed, while the loop with your DAQ acquisition will cause a continuously variable behavior time loop which is probably not what you want, or could cause you problems down the road if you're trying to do is to get the continuous acquisition of your DAQ hardware.

• Synchronization of multiple While loops

  Hi all

  I work with 4 all in curls that are independent from each other that is, there is no data flow in one loop at the other.

  I noticed that every while loop takes different time to iterate.

  However, I want to while loops to begin and end at the same time after each iteration.

  How can I synchronize their?

  Thank you for your response.

  Concerning

  Aveo

  Hi Aveo,

  You can use a few 'occurrences', 'Notifier', or "Rendesvouz" to synchronize your loops.

  Or use timed while loops - they can work in harmony...

• Model in the loop timed While the elapsed time

  Hello NOR community,

  I'm trying to use a while loop timed to run controller simulated for a mechanical system test. I need the time loop to run at an even 50 Hz to simulate the controller that will eventually drive the mechanical system. To check the speed at which the loop runs, I made a VI that gets a value from each loop clock and subtracts the value of the clock of the current iteration of the value of the clock of the previous iteration. I have eliminated all other codes this VI except for the recovery of the clock, to ensure that no problem with another code in VI. I find that the time between iterations is not constant, but it is consistent. In other words, the elapsed time can change at each loop, but it changes according to a specific model, such that the average elapsed time is equal to the value that I use for the timed loop. The loop will run faster than posed for several cycles, then slow down during a cycle even at the same time. Here are some examples:

  Running at 5 Hz: elapsed switches schedules between 0.203125 and 0,187500 seconds

  Clocked at 8 Hz: time is constantly 0.125 seconds.

  Operating at 10 Hz: elapsed switches schedules between 0,109375 and 0,093750 seconds

  By examining the differences between elapsed time and the stability of the 8 Hz setting, it seems that there is a minimum time of 0,015625 seconds (64 Hz) division. It is much worse than the 1ms accuracy claimed in documentation. This could be the cause?

  I am running Windows XP with LabVIEW version 8.5.1 and have observed this behavior on several computers with different screws

  Thank you!

  Erik

  Your problem is the function that you use to get the current time.  It's just the time of the Windows clock which has a resolution of 16 msec.

  You must use the function of number of cycles as Jarle has pointed out.

• How to control (or know) the speed of iteration of While loops?

  Hello world!

  Currently, I am implementing a 2 bit counter in LabVIEW. Fortunately, I was able to find examples on the forums of NOR.

  Yet, in real life, speed of the ILO 2 counters are controlled by a clock switching frequency to produce different outputs 4.

  In VI I downloaded, the 2 bit counter plays quickly with an unknown speed. Trying to put timing delays and other tools, but I have to at least be able to control the 'real' speed of counter 2 Bit inside the while loop.

  Is there a any basis on what is the speed of iteration of the While loop when the loop? I have really need to know the real speed and how to control this speed because I need to sync for demultiplexing purposes.

  Thank you and best regards.

  ____________

  Falsehope

  
  

• convert loop timed to normal while loop

  How convert a while loop time normal while loop with exact same properties and performance?

  I have donot need to worry about the exact date. But it takes the timed loop time will be run similar to loop.

  And also, is there any issue encountered when we use Timed loop? problems such as that crashing exe?

  Hello

  1 kHz is the used base clock. Then, you decide to use 10 as period (dt) which is 10 ms.

  The clock is selectable in real-time systems, you can use the 1 MHz clock, giving resolution µs

  But for your needs, using 1 kHz clock with dt = 10 and using a ms of waiting with 10 connected to it is exactly the same.

• Module speed FPGA, speed controller and timed loop speed

  Hello.

  I'm developing an application to acquire an analog signal at 800kS/s. Budget does not seem to be enough buy material excess spec. So I have to be very very accurate on all components. I had a look on the site and selected the following materials.

  9221 8 module capable analog channel on 800kS/s sampling. I don't know if this sampling rate indicated in the specification of the module means that it can acquire up to 800kS/s or is the device samples ADC sampling rate to which the machine don't maybe not to the criteria of Nyquist and the module can perform sampling to 1.6MS / s is necessary which I think is not available?

  9012-400 MHZ controller controller. If I put a while loop inside a VI under the RT target, it runs at 400 MHZ by default provided there is no code inside? Is so I could definitely use loop time express vi for sampling at the required level.

  What of the timed loop? I just developed a project of RT and added vi under the RT target. The timed loop default clock frequency is 1 kHz and I can't select more than 1 MHz?

  9112 chassis. Default clock 40 MHz. same rate issue which concerns the 9012 above controller.

  Kind regards

  Hi AustinCann

  If you need to acquire 800 kech. / s, then the module module-9221 will be able to do this, if you are using only 1 channel, that is.  The module using a global sample, therefore the maximum rate will be distributed on channels that you use.

  If, however, you have to detect the frequency of > 400 then you would need a higher sampling rate to detect these, as you mentioned.

  The controller processor runs at 400 MHz, even though the loops in your code will not run at this pace.  On the target in real time, you can use a timed sources of clock - usually 1 kHz to 1 MHz - and set the period in terms of the chosen clock.  If you need faster line rates, you can still code directly on the FPGA.  The CompactRIO Developers Guide is a comprensive document and deals with most of the concepts of RT and FPGA.

  The best course of action would be to contact your local office, because they have all the resources necessary for the specification of your system.

• Timed loop versus While loop

  Most of the machine control software I design have the following structure:

  1. There's a HAND that takes place inside a TIMED LOOP with synchronization of 50ms and priority of 100. His only job is to read / write data from / to DAQMx IO cards.

  2. the MAJOR can call several SUBs based on the choice of the user, and once a submarine is called FP MAIN is closed and the FP SUB opens. All submarines have a States Queued Machine running within a TIMED LOOP with 50ms timing but with priority to 50.

  3. data transfer between HAND / SUB is through function globals - there are many of them based on past data.

  4. all woks fine so far. No need to any RTOS. and platform of WIN7 is alomost standard. I even ran with a timing of 20ms without anything crashing...

  Problem: When there are a lot of file i/o operations in a SUB partciluar, then I have the chance to see several missed iterations. Perhaps the TIMED LOOP is hogging resources.

  What I want to do: convert both TIMED in asnd SUB HAND loops simple while loops.  But I am concerned by the priority - since the MAIN interacts with HW there priority. But with LOOP WHILE how can I ensure this?

  Or is there any replacement / effective way of doing what I do now?

  Rama wrote:

  .... FGV should be thrown out the window...

  Well used for a while, based on many articles in the KB. One of them is locked... and it does not represent the engine of the Action or of the FGV as a villain to avoid.

  The driving force is one of the largest buildings in LabVIEW.  The FGV who does nothing but Get and Set (or writing and reading) is useless and a waste of resources.  Why?  It does nothing to fix possible race conditions (does not protect critical sections) and it is much slower than just using a global variable.  See this example I put in place to see what I mean: an overview of the race Conditions.

  Rama wrote:

  So in the sample that I had attached, what do you think would happen if I just replaced the two loops with the SAME timed in MAIN and SUB wait value ms. is there a work order then?

  When things are at the same time, there is no such thing as the order of execution.  But as I said, it seems that your loop is quite slow, so it's something I would not worry.  Just make sure that you do not have a loop that uses all the CPU.

• While loop inside a timed loop

  Hello world!
  I use:
  -LV 7.1 + real-time;
  -compactFieldpoint;

  When I put some time, I noticed a strange behavior, loop inside a timed loop.  Let's fix loop timed with these settings:

  -Clock 1 kHz
  -1 ms period (Yes, I know it's short...)
  -offset 0 ms
  -Stage 0
  -Take the period of absence (ON) and maintain initial Phase (ON);
  -Timeout:-1.

  So, inside the loo, I put a traditional while loop, waiting (for example) an event will occur, and if this event doesn't happen, my cFP-2020 crashes! I mean, it becomes inaccessible for the debugger, and also, if I run a ping at his address, after a few cycles it becomes inaccessible as ping!

  Obviously, that statement of code lock the fieldPoint, because if I remove the inside while loop all work.

  I know that with 1ms duration, timed loop always the finishing of the delay, but I put the scrapping period missed and timeout-1.
    
  It seems to me that sometimes timed loop add overload heavi programs, I all so that the loop according to the tasks, even if my application has be in real-time!

  Tips welcome! Good day!

  Graziano

  Thank you very much for your answer!
  I'll test the entire application and then look for the best practice... but I still think I'll replace it timed with while loops loops...

  Good day!

  Graziano

• How to increase code efficiency in a while loop (using PXI5105 for sampling outside signal digitalizer)

  Theoretically, we want the PXI-5105 (digitizer) have 302 record with each record has a 1260 sample (the save operation is inside a while loop) in approximately 30ms, however we have found that for each period (30ms), the PXI5105 only perform about 10 records. It is so wired. I wonder if the operations inside the while loop consume more time (for example 3MS), so that he cannot have 302 records even the PXI-5105 have 60 M/s speed of sampling. Is it true, you can find my labview code and if possible can you give me some suggestion in the most short time of operation of the loop.

  

  Please find attached labview code.

  Hi g_l_g_s,

  The digitizer PXI-5105 acquires data at the speed that you specify and stores the data in its memory embedded (up to 512 MB). The data is then sent to your computer when the Multi Fetch Cluster.vi is called. In VI that you posted, you are only fetch record during each while the loop iteration. If you want to retrieve 302 records you will need to specify 302 files in the horizontal Timing.vi to configure. For more information about scanners, you might find the DevZone, hereuseful.

  To determine the amount of time it takes for each while the loop iteration, you can consider using the structure of code in the example comparison community calendar, which is located here.

• Control and Simulation in a loop / while loop with TCP/IP reading / writing of synchronization

  Hello, I have a problem with reading TCP/IP and written in two loops. The problem is NOT to get the two loops to read and write to and from the other. This has been accomplished. My problem is when I run control and the loop simulation on my laptop and the while on a RTOS remote on the controller on-Board of LabVIEW in a remote PXI chassis, the while loop the remote system running on four 4 times faster than the loop control and simulation on my laptop. In other words, for each iteration of the loop control and simulation on my laptop, there are 4 four iterations of the while loop on the remote system. I need to know how to get a degree of kinship (1:1) with these iterations of the loop. When I run a longer simulation in real time, say 10 seconds, the control and Simulation loop begins to slow, i.e. the simulation time slows down until it is no longer in real time and the "Late Finish"? Parameter is set to true and the LED lights and continues to stay lit. At this point, the system destabilizes due to what I believe is being well sampling rate too discreet and I have to end the simulation. How can I get a ratio of one to one between the loops and also to avoid slowing the loops causing destabilization?

  To give an overview of my application, I implement a control system in a network, seen in "image2.png". This is achieved using my laptop as a subsystem 1. Reference signals are generated from the laptop and the error signal is produced. Control measures taken and the control signals are sent via TCP/IP to the remote system. Position feedback is returned, and the process repeats. My system has Core I7 Procs w / 3 GB of RAM, up to 1 GB/s speed via ethernet and LabVIEW 2011 installed with all necessary modules and networking tools. The attached VI Custom_Wireless_Controller works on my laptop. The remote system I'm working on that has the 7830 NI R Series with FPGA card. OTN runs on the PXI chassis with an enbedded controller that has networking capabilities of up to 100 MB/s via ethernet. I use the FPGA for the acquisition of data and apply control signals to my plant. The plant is the PCE twist connected to the FPGA through the cable of the ECP - RIO of NOR. Subsystem 2 is this side of the CNE. The FPGA collects position, he sends to the controller via the network, receives signals from the network drive and writes signals to the plant power amplifier that operates the plant. This process is repeated and the VI and is titled Custom_Wireless_Plant.

  I appreciate the help really and look forward for her and for any question!

  Well, the first step is to understand what you have set up right now. Your control and Simulation loop on the side of the controller is configured as 'Runga Kutta 4' and you have a loop timed on the other side. In addition, you have the primitives of TCP/IP on the control and the Simulation diagram and means he will perform (a message) on the size of each minor step, which in your case is 4.

  So, you have two options:

  1. replace the Solver side controller Runga Kutta 1 (this must synchronize loops)

  2. hold RK 4, but create a Subvi around two primitives of TCP/IP and configure from the VI to run than the major (continuous) step-size. If you do it right, you should see a 'C' on the upper right part of the VI you have created.

  Please let me know if what I said is not clear...

• Measurement of time in a While loop

  Greetings gentleman;

  I'm kinda new to Labview, and although I sought an answer without assignment, I wasn't able to find one.

  So here my question, I would like to know how I can measure the time a loop sequence, in other words, what time is my point of view VI to run the main loop together?

  A little explanation, the attached VI tries to be a Markov chain, it takes some values in the first case structure based on the previus loop, then, if the values are correct, it passes to the next step and so on. It's pretty simple, and yet, my problem lies in the measurement of time. Since it is a 'distribution', it would take infinite time to execute a simple loop if it does not fulfill the characteristics, but it is scheduled to meet them so an average time should work.

  So, if you look to the while loop, should the big one, I want to measure how long I take for a ride.

  Thanks for the help, I'd be happy to read some ideas on how to measure this.

  Kind regards

  IRAN.

  You will find examples in the example Finder OR by searching for 'speed test' or ' reference '.

  Essentially, you create a flat sequence structure inside of your loop. In the first image, you measure the current number of cycles. In the middle frame, you run your code. In the last image, you measure the number of cycles again and subtract the first number of this. This gives you the run time to execute the code.

  You can see a page of the community about it here.

  There is a high-resolution time tick count VI hang out somewhere which is great for benchmarking and improving efficiency, used instead the number of cycles (ms) primitive.

  Edit - remember where he was

  https://decibel.NI.com/content/blogs/EvanP/2010/10/04/tick-count-us--microsecond-timing-granularity-...

• When boolean is set to skip a step in the while loop

  Hey guys,.

  I have a program that controls a fan that pumps gas at a certain speed. This entire process is run in a while loop. When we move from the gas by a gimbal which is located on the front, we immediately jump in a cycle of breakdown and then goes back to the pumping of the gas at the rate previous, but we do not know how to achieve this. Can you guys give advice? Thank you!

  Sincerely,

  The Z.

  Hello,

  A shift in your loop register may be able to achieve this type of functionality. If wire you the switch in the shift register to the right and register in the structure in case of wire left shift, the loop must travel once more before moving on to the HP gas. Here is a link to a tutorial on shift registers:

  http://www.NI.com/gettingstarted/labviewbasics/shiftregisters.htm#shift records

  -Erik S

• While loop within a while loop

  Just a general question, is a timed, while that while loop the loop inside of a timed bad design practice?

  Any feed back on why it shouldn't be done is appreciated.

  mhaque

  Yes, it's very bad design.

  The outer timed loop cannot complete its iteration unless the timed inner loop ends. This means that its target of time cannot be carried out unless it is guaranteed to be much longer than the total time of the execution of the inner loop. Too late!

  What are you actually trying to do with all this?

• How to create a control of time for the while loop?

  Hi all

  I want to control my time running of the loop. In other words, I want to stop everything in the execution of the loop after a time (in ms) that is defined by the user. For example user defines Control Panel for 5 seconds before a while loop runs and stops after 5 seconds.

  I don't know is it possible with the while loop. I managed with the timed loop, but this must be wrong with my application. Y at - it of the other loops for timed control if it is not possible with while loop? There is also a simple loop with .vi random number (0-1) as an attachment.

  Best regards

  Jick

  Hi again,

  I managed to solve my problem right after I posted my first message. I did it with the passage of time and the register shift (for the elapsed time of reset).

  Thanks for your replies anyway!

  Best R

  Jick