LM3S8962: SPI clock problem

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• USB8452 - how to set a clock of 20 MHz SPI Stream mode?

  Hi all
  I can't really manage set a clock of 20 MHz SPI Stream mode.

  To set how often I use this property node (see image)
  [for example to set a 1 MHz clock, I put:]

  1. Wave1.TMNG.SclkLow = 50 (500ns)
  2. Wave1.TMNG.SclkHigh = 50 (500ns)]

  And everything works fine.

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  1. Wave1.TMNG.SclkLow = 2.5 (25ns)
  2. Wave1.TMNG.SclkHigh = 2.5 (25ns)

  But, unfortunately, I receive a 25 MHz clock.
  I know the USB 8452 can generate a 20 MHz signal, so I think I'm doing something wrong, but honestly, I don't know what to do.
  I see that the entry for Wave1.Tmng.SclkLow/High is a U32, then perhaps it truncates my 2.5 to 2 (i.e. a 25 MHz clock), but given that the USB8452 can generate a 20 MHz signal I honestly don't see the point of this.

  Thanks for the advice/help,
  Federico

  

  Hi Federico,.

  as you can see in the image below, the number that you set is the number of clock cycle of BASIC that make SPI clock.

  Base clock is 100 MHz, then the single 10ns resolution. You have to choose between 20 and 30ns or try to have 20ns high clock and 30ns low clock.

  Teo.

• Blackfin multiple SPI devices

  Hi guys:

  Sorry to post this question, but I really can't get it to work!

  I can configure each SPI device and they work only, when I try to config 2 devices, I can't just two lines of CS to go up!

  Note: Here is my code, I choose slave select 4 so it is easily accessible via SPI connector to the Board of Directors (PIN 14)... SS1 is pin 9!

  Thanks in advance

  I like your "main.vi" instrument, but unfortunately, I think the AD7476A driver was not designed with several converters a/d in mind, let's dig a little deeper.

  "Declaring Slave Select" command limits the value 1-7, because the SPI device can drive directly only this amount of devices, each of them being validated in accordance with the SPI_FLAG registry. Notice that in the DMA transfer mode (case of pilot AD7476A) CPHA = 0 and SS pins are automatically selected at the beginning of each transfer: for each bit set to one in SPI_FLAG a low pulse will be generated to the corresponding pin! (These bits are set on a per activate slave select or declare slave).

  He had been great if playback turn slaves, but isn't.

  I'm in the island you will not wait 1 MSP for all a/d converters. The AD7476A conversion time is determined by the clock series: the pilot sets the SPI clock on the sampling frequency of 16 times. This is why must be given a higher value in the sample spent at BF AD7476A Control.vi clock:
  For a system with converters a/5 n and 100 KSPS value must be 500000. Inter-channel delay is in this case 2 microseconds, so the difference in time between the first sample of the first string and 5th Channel is 8 us (almost equal to the sampling period), this could be a problem in some applications.

  However, more information is available in the description of the material (ADSP-BF537 Blackfin processor Hardware Reference ), documentation of device driver (C:\Program Analog Devices Devices\VisualDSP 5.0\Blackfin\docs), and drivers of source code (C:\Program Analog Devices Devices\VisualDSP 5.0\Blackfin\lib\src\drivers). Here, I would just say it seems circular buffer are not taken (see VisualDSP 5.0\Blackfin\docs \spi\adi_spi_int.pdf and adi_spi_dma.pdf) and move to solutions:

  1 reconfigure the SPI to use interrupts and use reminders to go through program slaves using BF SPI Control.vi "Select/deselect"slave"(of course, each of the ointments pins must"Declare Slave Select"with BF AD7476A Control.vi or"Activate Slave Select"using BF SPI Control.vi). This will add overhead and, depending on the sampling frequency, you may lose a few samples. Also, there is a limit of only 7 slaves.

  2. turn on DMA for a single word and switch slaves in the callback after each conversion result (of course, this will have the same disadvantages as #1).

  3. Add a simple external hardware to automatically select the a/d converters (for example a counter + decoder clocked by one of the seven pins SS and reset using EIO). Then play with stamps to identify channels (example buffers 1 d with 5 items for converters a/5 n). This will add less overhead, reminders will trigger once a sample of all channels was acquired (or even better after n samples, if the length of the buffer is nx5, etc..)

  All of these solutions, to open and close AD7476a driver only once in the 'main.vi.

  #1 and #2 similar to your posted solution above but the command must be select/deselect for interruptions and toggle for DMA. The slaves should be put in exactly at the end/beginning of each word received.

• MyRIO SPI on FPGA

  Hey guys,.

  I have a MyRIO and an AD7690 (18 bit - ADC). The communication is done by SPI and I want to use the data on the FPGA, for this purpose, I want to use the FPGA as interface for further processing.

  I need just MISO, SS, SCKL I give any orders to the slave (ADC). I want to use the SS signal to trigger the start of the conversion.

  Now to the problem:

  1, there are already screws in the SPI folder on the target, but there is no description at all.

  Someone of you can give me a link to their discription?

  2, would you advice me to use the following example: example of SPI

  I think it's a bit overwhelmed, and it takes a lot of resources that I only want to read.

  Hope someone can give me a suggestion, what to use or write my own interface better.

  Kind regards

  Slev1n

  Brief update for question 1:

  I called support and the 4 MHz are valid if you use the SPI screws, which are already in the project myRIO (e.g. SPI Express VI). The 4 MHz is also the maximum SPI clock frequency.

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• NEITHER USB-8452 - reach the maximum write SPI speed

  Hello

  I have a USB-8452 with the latest version of the software installed (2.1.2). The host computer is a Core i7. I am trying to achieve the maximum SPI write speed with the camera possible. I tried the basic block read/write SPI, SPI Scripting blocks and SPINNAKER streaming, but the first two have large delays between CS falling and the data being written (with so that delays in loop), and the last seems to be useful only for read operations.

  Can someone tell me if there is a way of a) reduce the time of installation for basic SPI / SPI Scripting or b) writing different values in a single stream of SPI? Thanks in advance for any help on this issue, even if it's just confirmation that yes they is hard limits that cannot be overcome with the LabVIEW 8452 interface at this time.

  Here's the best I can do right now, as shown in my logic analyzer. Change of the SPI clock speed does not affect installation time and delays that are primary and secondary bottlenecks:

  SPI read/write database-

  Program: Basic Configuration followed by read/write of SPI block itself in a while loop

  Main bottleneck: ~ 450 delay us into iterations of the loop (see Figure 2)

  Secondary bottleneck: ~ 6 us delay between falling edge of CS and the first synchronization signal (see Figure 1)

  Capture 1 - delay highlighting between CS falling and first SCLK pulse

  

  2 delay highlighting between all iterations of the loop of capture

  

   

   

  Scripts of SPI-

  
  Program: Followed two Script blocks Basic Configuration run in a while loop (to check the two block to block and delay loop iteration)

  
  

  Main bottleneck: ~ 450 delay us into iterations of the loop (see Figure 3, space between the second and third images captured)

  Secondary bottleneck: ~ 250 us delay between blocks of Script run consecutive (see Figure 3, space between the first and second captured images)
  

  Capture 3 - highlighting delays consecutive run the Script and delays between while the loop iteration
  

  
  

  SPI in Streaming- It's the closest to achieve a fast writing speed, but unfortunately, it seems to be only useful for read operations (e.g., ADC), do not write.

  Program: Configuration of the base stream followed by start of the flow block

  Main bottleneck: impossible to write something else than the data value unique property "wave 1-> MOSI data." I can write a byte array to this property, but it will simply put all these bytes in an image and repeat this framework (see Figure 4) rather than go through each value.
  

   

  4 - two bytes sent repeatedly using SPI capture stream. Delay of CS is finally good, but no possibility to change the MOSI image to image data.
  

  

  Hi JBender1,

  This show looks like what we would expect for a 8452.

  If you need higher performance, I encourage you to watch using a card R or FlexRIO FPGA series for your implementation.