R series: compared to current output output impedance adaptation

Hello

I wonder about the output impedance specified for SMU-782xR and some other adapter module ike l 6581.

The specified output impedance is 50 ohms. To get the best signal integrity, it is imperative to adapt the impedance using a cable (transmission line) with a 0 hm 50 characteristic impedance and impedance of 50 ohm load.

But I don't understand how this is possible, because with a high level of 3.3 v, the output current proposed spindle must be 66 my. The current per output pin max 7821R is 4 my.

This FPGA offer 128 pins, so that the maximum total output current should be of 8.5 A, so 28 w. It's not realistic!

Could someone explain why outputs are 50 ohms?

And how do I adjust the line and the termination of employment?

Thank you and best regards,

Benoit Chantepie

Benedict,

After some thought, the concept of the output impedance is really not applicable outputs logical digital because they spend most of their time in the saturated States and time spent in the transitory States is not usually specified with the exception of the time limits.

What is your purchasing process is I would ignore the specification of output impedance. Watch the voltage and current limits. If those who do not meet your needs, consider external buffers. You can specify the buffer to meet the requirements of your testbed (including protection against defects if necessary) and to meet the specifications of the devices OR.

Lynn

Tags: NI Hardware

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