Single channel match trigger speed model vs onset of edge on the PXI-6562

Similar Questions

• Memory of the PXI - 6562 Max per channel

  I have two questions.

  I have a PXI - 6562 and a data set is 256 MB (32 MB). I want to send the data in this dataset on a single axis of I/O serial. basically, I would like to spend my little of a set of data at the same time on both edges of the clock on an axis of IO. I don't like on the other IO pins. Is this possible with the PXI-6562 or all bits in each octet in the memory of the card corresponds to a specific channel.

  If I can't send my data in series then I will accept that to encode every bit in my data set in the form of byte with a bit of data and the other zeros. This means that, for a set of data from 256 MB, I would need 8 times more memory 2048b. I understand that there are a total of 2 GB of RAM on the PXI-6562. Is this all addressable RAM in series? I can write the data of all the 2 GB of RAM for say 8 i/o ports?

  gtg811q

  With the PXI-6562 even if you want to only output a channel you must always write in a format of U8. So, as you describe you that a single bit, worries you, and you will need to set to 0 for the rest. This means that all data that you generate will be the value of 256 MB of data, because the smallest unit you can write with the HSDIO driver is the U8.

  Now in regards to moving data on the two edges of both sides of the sample clock, this is called Double flow of data and is available with our devices OR 656 X and 6547 and 6548 devices. We have a developer area which details the DDR option more.

  Advanced features of NOR-HSDIO: Double data rate

  http://zone.NI.com/DevZone/CDA/tut/p/ID/6718

  In reference to the memory of the generation, the width of the data to the memory of the generation is not configurable by the user. This means that if you have the 128 MB / channel option your total memory available per channel is 512 Mbit/channel. Because the width of the generation of data is set to 1 byte, and you get 4 times the memory per channel mode DDR with the 6562. The KB below explains the behavior. Look under the section 'Generation '.

  Width of HSDIO and allowance data memory:

  http://digital.NI.com/public.nsf/allkb/E5170A54988EF81A8625725A006103BB?OpenDocument

  So, in summary, the total of 2 GB memory won't be available for a single channel, but you have a total of 256 MB/channel available for each channel. Since you are really interested in only one channel you will be able to write data from 256 MB to you. As you would put all your data on the memory of the card you have to the flow of the disc on your generator HSDIO card. To do this, we have some examples:

  NOR-HSDIO Stream from disk (generation) using Win32 IO file:

  http://zone.NI.com/DevZone/CDA/EPD/p/ID/5270

  However, there will be a bottle neck on your PXI backplane data, because the basket max transfer rate will be around 100-110 MB/s you will not be able to cope with your generation session. Since you will write in U8s each sample is 1 byte, which means that the best you can hope to stream would be around 100 MHz or more.

  We have not the cards LVDS SMU (PXI Expresss) which would allow you to have a superior data through-put, but if you do not necessarily need the LVDS, we have other options. I'm guessing you need LVDS or you would not the 6562.

  The other option is to write you data in parallel in the 8-bit generation DDR and then use an external serializer for an 8 to 1, then you would be able to use all of the available memory and you would probably be able to fit all your data on the memory of the card and you do not have to stream from the disc. This external serializer allows you to put your first data point on channel 0, second data point on channel 1 and one until you loop around back and have your second sample generated between the way 0 be your 8th overall your waveform data point.

  I hope this helps and let me know if you have follow-up questions. Thank you!

• PXI-6562 Multiple trigger

  Hello

  I'm trying to trigger the capture of the PXI-6562 with multiple PFI.   Since I did not extract the available channels, I can't use pattern trigger.  My idea is to have PFI0 and PFI1 as a trigger. So, the DIO card begins to capture data when PFI0 = HI and PFI1 rising edge.

  I don't know if the PXI-6562 is able to do. I just want to avoid the construction of any additional hardware.

  Thank you!

  Andy

  Hi Andy,.

  Unfortunately, the PXI-6562 does not support the combination of trigger for the acquisition of the PFI lines you describe.  A trigger pattern to achieve match but only if you use a combination of the DIO lines.  Otherwise, for the generation, perhaps you could implement this with two separate script triggers and a condition statement.  For you the request, I would recommend using a simple gate circuit to let the relaxation through when the other line is high.  A door AND would also work.

  I would like to know if this helps, good luck!

• HP Pavilion Slimline S5 - 1050d: Upgrade of RAM - single channel memory

  
  

  Hey, I want to just update. I installed another 4 GB of RAM with the same features (I decided to buy online).

  It works and BIOS shows two-channel after 2 slots taken.

  So, I guess he showed single channel because only simple slot taken.

• Get the Max values and average of the different cycles in the single channel

  Hello

  I'm trying to get the Max values and average of the single channel that has different cycles it contains. I tried to use commands such as Chnclasspeak3 and chnpeakfind, but they were not useful for me. What I need is the Max values and average of the different cycles numbers saved in the data channel.

  Exampld if the string contains 5 numbers of repetitive cycles, then we must find the maximum values and the average of these 5 cycles in the single channel. Attached reference data. This is the .raw file and I have the plugin for it to use in diadem 11.1.

  Kind regards

  X. Ignatius

  Hello, Ignatius,.

  Sorry, it took some time to provide a replacement based on the script for the function. Please take a look at the attached script. I changed the script to use my function if the tiara-version is less than 12. My script function is not as fast and more stable than the implementation of tiara, but for now, it does the job

  Andreas

• HP 21-2024 all-in-one desktop: Single Channel Architecture

  Just bought an all in one PC for my family and it comes standard with 4 GB of RAM running Windows 8.1.  I would like to upgrade the RAM, 16 GB of RAM to help with the slow performance that we see.  The documentation says that the motherboard has a single channel architecture.  I can't find any ddr3 memory that are not dual channel kits.  Can I put into sticks dual channel and everything still work?

  Thanks in advance for your help.

  Hello

  See the bottom of specifications of memory for your PC.  HP has the DIMMs of memory you need.  The memory will run in single channel mode verses the typical dual channel, but unless you have some intensive memory access applications I doubt you will see much of a disorder of the performance.

  

• Unique blend of 8G Single Channel DDR3 1600 with 4 GB Dual Channel DDR3 130

  Just bought a new set of 5000 Dell Inspiron with 8 GB of Ram DDR3 1600 mhz the single channel.  I use Coreldraw and Adobe Photoshop.  Should I spend my modules 4 GB Dual Channel DDR3 1333 mhz from my old Dell 1700 Inspirone series

  The new system uses DDR3L - all phones basic Haswell do.

  Definitely worth not RAM mixture - if it came with a module of 8G and you need more RAM, buy another module of DDR3L-1600 pair with the existing 8 G.

• Extract single channel DAQmx task

  Hello

  I created a task DAQmx output, which contains two channels.  Is it possible to extract the individual virtual channels of the task to be dealt with by two parallel processes?  I tried to bring out the ownership of channels using a task property node, but then I get the error that the channel is not part of an active task (see excerpt)

  Could someone advise on a better approach, or how to obtain this feature - if that's possible?

  Concerning

  Dave

  Sorry, that VI does not have much sense. You must use a unique DAQmx writing for both channels and 1 sample mode, simply build an array of signals as shown below.

  

• How to trigger SMU - 6363 AI with the PXI-4142

  Hello

  SMU-1082

  SMU-6363

  SMU-4142

  LabVIEW 2012 SP1

  Hello

  I'm trying to trigger action (SMU-6363) analog input with my SMU (SMU-4142). The API OR-DCPower has a VI called VI of Signal to export, that I could use to export the trigger signal in a specific line when 'Complete the event Source' comes up on my EMS.

  The problem now is that i ' v tried several lines to transfer the signal to the SMU-6363, but unfortunately I still have an error of DAQmx. Has anyone tried similar before sync? Which internal lines I have to use to get this working? I'm just not producing a moment of tension at the time that the EMS (Single, Point). After SMU has defined the level it must send the trigger for SMU-6363 who would then measure the external signals constantly.

  Thanks in advance!
  -henkka

  Hello

  I solved the problem of routing measure relaxation of SMU with Signal.vi export online PFI0 of SMU-6363 (SMU 3 channel). Then I started every other SMU channels (0:2) with this signal to trigger by using the configuration digital edge measure Trigger.vi (the VI input terminal is PFI0).

  I configured the data acquisition sample clock to use the PFI0 as a source of the clock. With this method I am able to measure sinus 2 kHz generated with four channels EMS individually with my DAQ without no phase shift (0.1 degrees) between own EMS measurement and data acquisition.

  Hope this helps anyone with the same kind of problem.

  Best regards

  -Henry

• The speeds are horrible!  need help with the best settings.

  I can't not significant with my internet speed (less than 1 Mbps in the speed test).

  These speeds are intermittent.  Sometimes - but rarely - I get much higher speeds I have pay for.

  My provider is Time Warner.  I have a time capsule tall which is 1 year old.  I also have an old flat capsule which is a wireless extension, as well as a newer airport express (flat type) and an airport express that plugs on the (old) wall as extensors as well.

  I called Time Warner repeatedly.  They have sent people twice and messed around, but the problem persists.

  I started think maybe it's time Capsule.  (I tried my old mac into the router directly - wiring because it has an ethernet port - but it would not connect).

  I don't know a lot about what do all the settings, so I have not messed with a lot (even if I tried to change the renew the DHCP lease for 1 hour instead of 1 day).

  Could give me an idea on the best settings for a time used as wireless with extensions Capsule?

  Is it possible that my older Extenders slow down things?

  Thank you.

  It is usually best to start from scratch.

  This modem do you have? Brand and model please.

  Simply run the TC... measure speeds... by wireless and ethernet and report.

  Run the TC and the new express... (much better than GEN 1 or 2... TC equal but gen3 gen4 TC is greater than the express new).

  In airport utility watch connection speeds. It shows the speed of connection, if you place your mouse over it.

  Slow links will cause worse problems on the line... Make sure that all the repeaters (wireless extensions) get at least good signal...

  Please give numbers and the screenshots as it helps no end.

• The original loop iteration after receiving the trigger of the PXI-6652 pulse

  Hello world

  I apologize if this has been answered somewhere else, but I'm having a hard time finding examples and tired after a long day of work.

  in any case, I use a PXI chassis with a PXI-7854R FPGA Board and module synchronization PXI-6652.  I have the FPGA biphasic pulses being generated at 8 analog channels.  I want to be able to do is to send a trigger (say at 1 Hz) for the PXI-6652, which begins at the exit of the biphasic pulse on the FPGA.  I'm running the FPGA through a host program as the variables on biphasic wave will change based on the current experience.

  So, in short, I was wondering how to generate a trigger of the PXI-6652 pulse and then use this trigger in a host of VI to start an iteration of a loop.  It seems simple enough, so any help would be appreciated.

  Thank you, and I can post the code tomorrow if necessary.

  To answer your second question, Yes, the driver NOR-SYNC 3.3 is available for download and use with LabVIEW 2011.

  As far as use the PXI-6652 to start the acquisition on an FPGA VI, we have enough good examples provided with LabVIEW that will show you how to proceed.  To actually generate a trigger with NO-Sync, there are several examples in the Finder for example of NOR (help > find examples) which send a trigger one of the PFI lines to be used with the other modules.  You can search for OR Sync and they all appear here.  You need this driver installed first before you see anything, however.

  Also, if you look through the viewfinder of the example under Hardware Input and Output > R Series > FPGA Fundamentals > triggers and guard dog, you will find an example of triggering good enough it for use in your FPGA code.

  This example uses NO-Sync to trigger a device of the M series, which is not relevant to what you are doing (he uses DAQmx), but there is a very good example of generation OR-Sync trigger here who I think can help.

• Any knows Aspire 1430-6436. Model no is ms2296 can improve the memory from 4G to 8G or more?

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  Thank you very much.

  All sites of said memory maximum memory is 4 GB PC3-8500 204Pin.

  Something lik, it would be very good.

  G.SKILL 4 GB (2 x 2 GB) 204-pin DDR3 SO-DIMM DDR3 1066 (PC3 8500) Dual Channel Memory Kit portable model F3-8500CL7D-4GBSQ

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• I have a Macbook pro (2011 model). It gets stuck on the start screen on to half way through commissioning. This happens whenever the mac turns on. The problem is solved when I reinstall Yosemite to boot to Recovery Mode disk utility.

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• Extract and save all the channels of the PXI-5105 with 4 M of edge detection... Help!

  Dear collegaues!

  Please help me to improve my request, exhibit attached and sorry for my English.

  So my task is to extract and save all the channels (eight) of the PXI-5105 with 4 M of detection of peaks and sample rate 4 M with loop 1 sec...

  Entered all my channels are wiring detectors NaI with 0, 5... 1 microsec pulse (really) width and 0 kHz at not more than 40 kHz freq.

  Why I chose the registration of 4 M and the sampling frequency of 4 M namely? Answer is that I tested previously PXI-5105 40 kHz generator and pulse width 0.5 microsec. It works great and detection of peaks indicate 40000 pulses/s for me. If I set lower than 4M record and sample rate of 4 M, it is without work. In my honest opinion record 4 M and the frequency of sampling of 4 M are parameters very min.

  In the detection of peaks time present only 6 working channels... When I connected to diagram more 6 "detector.vi peak" - I see the error "...". out of memory... ».

  Advise me please, what needs to be done to it, it's all working well.