5603 IF given NOR 5761/a. port

Hello

I have a composed of digitizer vector signal Analyzer 5622, 5603 frequency step-down converter and synthesizer 5653.
I also a 6674 t connected to an atomic clock synchronization module and a card 5761.
Instead of going directly to the digitizer, I am currently trying foods I / data Q If the buck converter of frequencies at the Ch0 of 5761 card input (A/D)
in order to process the data immediately in the FPGA.

To get to the point, I'm trying to synchronize the clocks of the ASB and the 5761. as well as the module of synchronization,
as I am able to get the number correct samples at a certain frequency of sampling to the 5761 entered.
What I need to do to exclude the digitizer and have the 5761 in lieu of the digitizer?
I'm quite new to using NI DAMA and Module synchronization tools in Labview, but I've included the VI I am trying to run on the host side at least for
a Visual idea.

Richie

Hi Richie,

It is possible to generate two different clocks, but you shouldn't need to. The best way to do it would be to spend the clock by Ref Out of 5653 for Clk synthesizer in the digitizer 5761. More information is found in the Starter guide for the SMU-5665. Replace just the 5622 by the 5761.

The LO is usually set on a certain signal IF according to the RF input to output. I don't think there is a way to change this, but you can set your scanner to wait for the correct values.

Concerning

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