Bug in AES i/o variables?

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  Hi Russell;

  I just tried on a test with DIAdem 2014 SP1 machine and saw the same behavior as you. I couldn't find a way around the issue other than to add the variables before you start debugging or for updating the software to tiara 2015 in which the issue has been resolved.

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  I found a bug related to named e / s and the illogical way to access their fast table according to methods. It creates a lot of work around hackery & trick to mitigate. Fix this bug would be more appreciated to a permanence of code and maintenance perspective.

  Deployment looks like this (note the scale indicated in the name):

  

  Yields of running code (with scaling mentioned previously):'

  

  It's a little too weird for the engineers used for normal operation for example in the implementation of the class outstanding world DAQmx to access I/o table based.

  Home is at the origin of the project.

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  / Roger

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  Sorry for not not follow up with you on this issue before.

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  Think of it as a feature for now

  Kind regards

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  Welcome on the support forums.

  You must initialize the static variable
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  See
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• HP problem first Solver (bug?)

  Solve (r = f ^ (a - ln (f)), f)

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  BUT, if I replace the 'a' in the above with any number between 0 and 1, for example, solve (r = f ^ (0, 5 - LN (f)), f), it gives an incorrect answer.

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• Renamed 3 variables shared on the network in Subvi to starting RT VI, now they won't write?

  Hello world

  I worked on an RT program deployed to our cRIO-9024 with custom FPGA, and I changed the way in which the data is written to these three types of DBL 1 d. I renamed the shared variables ("shvars") in the library of the RT project shvar and also changed the target to the PC for the debugging of the function of the code written for them. I used a struct of conditional compilation to turn them off and something has been corrupted along the way and the second node broken shvar (node moved directly from project, no programming style) and caused a hard compilation failure in the Subvi. I got the compile error and go after the removal of the node of shvar entirely and placing him again the project and everything seemed fine.

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  Thank you.

  Edit: Notice the same level superior RT vi successfully wrote in 19 other shvars that I have not touched.

  -Very well, I shot myself in the foot and was in fact barking the wrong tree. Put shvar nodes in a Subvi was well and not at all related to the problem.

  The problem is that I had a bug in my code FPGA in a particular case, that could get him to stop putting valid data. Once I corrected this bug, everything returned to normal. I would like to delete this thread, but a little shy is right for you.