Port additional ethernal PXI

Similar Questions

• How to read and display a my a miccrontroller (MCB1700) on labview signal connected via a port on a PXI machine CAN

  How to read and display a my a miccrontroller (MCB1700) on labview signal connected via a port on a machine PXI CAN?

  I tried using a DAQ Assistant, but the port is not included as one of the physical channels supported, even if all his drivers are up to date.

  Help, please...

  Thank you.

  If you can read it in MAX, then you should be able to run the NI CAN example.

  Help-> find examples

  Find the CAN and watch CAN Receive.vi.

  Basically, set up the network, open the object, read in a loop close object when it is done.

  If you have any questions about the example, go ahead and post your vi and we can work from there.

• On the PXI-8106 serial port connection problem

  Currently, I am trying to connect to the serial port on the PXI-8106 via RS232 module. However, when I try to run the Test VI opened for COM1 MAX (PXI Remote) running on a PC, I received an error like below:

  Returns the status code: 0xBFFF00A8

  Name of the State: VI_ERROR_NPERMISSION

  Access to the resource or the remote machine is denied. This is due to the lack of sufficient privileges for the current user or the machine.

  Right now I'm just a just loopback test to ensure that the interface for device is working before you start my labview code. I'm not sure what the problem is exactly, if it has to do with the PXI or PC. Could you please suggest a few solutions to this topic?

  Thank you.

  I managed to understand. It did not work on the right platform.

• Use the USB port to emulate keyboard

  Hello

  Is it possible to use a USB port of an on-board controller (PXI8108) to replicate a keyboard when plugged on a device waits

  a USB keyboard?

  Thank you

  Gary.

  What I understand about USB, I don't think that you can do.

  The USB ports on the PXI controller host ports are and as such cannot be used as ports of the device. A keyboard would be a HID device class. Maybe it's a kind of emulator HID that could be placed between the PXI and your USE awaits a USB keyboard...

• PXI-8104 external USB not recognized disk?

  When I plug a USB key or USB key into the USB port on my PXI-8104 RT controller, the system does not appear to recognize him. Nothing does the mapping to drive u: or D:, so I can't write for her and I can't transfer anything using FTP or another utility such as MAX or Filezilla. Any ideas?

  This is the module of USB support. I had a feeling that I missed something software wise. Looks like that it would have highlighted in BIG LETTERS "BOLD" in the PXI manual.

  In any case, thanks for the help.

• How to read the digital I/o using PXI-7813R?

  Hi guys,.

  I'm reading a digital signal by using one of the ports in the PXI-7813R. The 7813R has 5 digital ports or 39 lines for playback of digital data. I have connected a SCB-68 as the physical hardware interface for 'plug-in' a 5V adapter, which will act as my signal at the moment.

  After you configure the PXI via MAX, I wrote two codes, one for my host pc and the other to control the FPGA through the host. But I think, I can have more complicated or completely gone in the wrong direction.

  Any help in the drafting of these codes would be well appreciaetd.

  Thank you, Anoop

  You need the FPGA to sample the signal how often you expect the device to send the data.

  If you write your data in the FPGA for the DMA, then on the side PC you just have to read the DMA.  I like to think of the DMA as a queue.  It makes it easier for me to understand how it works.

• groups and iSCSI connections to ports

  Hello

  We have a 5.1 esx server connected to an iSCSI-based storage device.

  the server is connected using two of the vmkernal iscsi ports.  each network card has a different ip address on the private iscsi vlan.  the configuration is according to the practices of bast vm using only one network by vmkernal port card.

  We have a migration of storage to another storage but I still have to intall it.  I would like to know if its possible to create two groups of ports additional vmkernal using the same NIC already connected to the iscsi storage.  new port groups on one vlan separate and different netwok so go looking, it seems right that I share two NICs for two networks different iscsi.

  as mentioned above, that I have not installed the hardware yet, but to test it a bit it looks like I can add groups of ports by using the network card and I was able to bind to the vmhbaxx with the adapter of storage with the path of staus as not used.  so I hope that when I connect the new buffer I would be if all goes well able to connect once I place a discovery?

  any comments welcome.

  Thank you

  I don't see why you shouldn't be able to do what you describe. It's a little unusual, but it should work to create adapters to VMK several on the same vSwitch and make the same active/unused configuration you already made, but put other id VLAN and IP address on the new adapters. Of course the two logical VMK adapters share the same network link, but you are fully aware of.

  As long as it is not indicated in some manual or KB article as a solution not supported, you should be fine.

• Do IMAQdx and NI GigE Vision 2.0 material support?

  Hello

  From my brief research, GigE Vision 2.0 has features very nice that I'm at the end which are not supported by previous GigE Vision 1.x standards:

  • Compression on the side of the camera
  
  
  • Timestamp and sync IEEE 1588 (PTP)

  OR those taking? If not, are there any plans to add support in the near future?

  Thank you!

  Hi again,

  Thanks for the extra frame.

  Assuming that your only using the camera is saving JPEG images on the disk, and you are concerned about the performance of the acquisition system, I think that an IP camera might be a better choice. These cameras acquire images compressed, so you can very well save the direct-to-disk with no extra charge. This will save time and bandwidth of the network processor. The bandwidth would be nice because you could probably just run 6 cameras in a gigabit switch and connect to a port on the PXI chassis instead of several 8234 ports. This is possible because not only if bandwidth is reduced, but the IP cameras can use TCP and sharing bandwidth much more enjoyable that can cameras GigE vision. To save the raw images on the disk, you can use the IMAQdx VI "Get Image Data", which is a JPEG file that you can save directly to an IP camera.

  Regarding the time stamp data, depends on the accuracy required. Since you recorded all the time after that image returned, is quite imprecise because it is not really correlate with the acquisition time. You might get a more exact time in two ways: record IMAQdx a CPU timestamp on receipt of driver that you can use (useful if the CPU is synchronized to GPS/NTP or similar) or you can use a timestamp saved in the image itself in the form of metadata (GigE Vision and IP cameras can do that). I think the Basler IP cameras can use NTP and testify to the time stamp for metadata EXIF JPEG images that you can extract. This mechanism is of course much more precise because it eliminates the delay/jitter of transmission at the time. If you have a few requirements of precision (microsec, milliseconds, seconds?), it would probably give a better idea of what your options are.

  I suggest you take a look at the range of cameras from Basler IP. You can not control the parameters of the image directly in the IMAQdx driver (you must use their web interface, or write additional HTTP code), but once you have the configured device it will keep these settings.

  http://www.baslerweb.com/en/products/network-cameras/IP-fixed-box-cameras

  It is likely that the cameras will be more expensive that some cheaper GigE Vision cameras can be, but I suspect that you could save enough on other system costs will in this way to make up for it. In my opinion, doing compression JPEG on-the-fly with 350 + MB/sec of camera raw data could be difficult, unless you had a tough multi-core system.

  Eric

• No sound via HDMI after upgrading Vista to Windows 7

  Data sheet:

  HP Pavilion Elite m9515y

  Sound:

  Realtek ALC 888 chipset s

  Video:

  GeForce 9600 GS

  With the original operating system Vista, I could right-click on the speaker in the taskbar and select the playback device and make the default output HDMI.  I erased my drive and installed Windows 7.  Now under the playback devices I have not the HDMI option.  According to me, speakers, headphones and Realtek Digital Output.  Sounds works fine with speakers or headphones.  I tried to install the latest audio and video of Nvidia and Realtek drivers.  I tried to go back to the original Vista drivers.  Nothing works.  At the moment I use a stereo cable to connect my PC from the headphone jack on my TV, but wish that I could get good audio HDMI works with Windows 7.  Anyone else having a problem with these chips sets?

  PROBLEM SOLVED!

  The motherboard has two S/PDIF outputs.  A pass by a connector and the wire internal graphics card HDMI.  The other goes to a RCA Jack on the back of the computer.  During normal operation of Vista, the driver probably did some function to determine if the HDMI connection is used, so that it does not disturb the owner of a system without card HDMI with this audio port additional inaccessible appear under their playback devices.

  Unfortunately, the BIOS or the audio driver or video card driver require an update for Windows 7.  No matter what function is used to detect if the HDMI connection is present does not, if ever it comes in the playback devices.  I hope someone at HP or Nvidia, Realtek is tuned for this.

  Until the corrected drivers or BIOS, I found a coaxial wire thin with an RCA connector on one end and who connected to the Digital Audio output on the back of the computer, transferred this thread in my machine, then cut and solder this wire over the graphics card HDMI input S/PDIF.  It seems stupid, but works like a charm.

  So ends 3 days of aggravation.

• USB hub

  I have a PXeI8101/Windows 7 Pro.  It has only 2 USB Ports.  Can anyone recommend a regulator?  (Maybe USB Hub?)

  Ports of maybe 4.  The PXI chassis is internal to a Test set, so I want it as self powered.  I don't know what that 'of bus, self-powered; bus powered; food sector and self-powered"are.  If the usb power HUB the SMU can provide the current needed to do?  What is 'Very high concern Substances' option?

  Thank you...

  Hi Clint_Eastwood1000,

  You should be able to use a hub USB with your SMU-8101 OR lacks a recommeded device.  However, you can find this thread helpful:

  http://forums.NI.com/T5/PXI/what-s-the-easiest-way-to-add-USB-ports-to-a-PXI/TD-p/786302

  Kind regards

• 6682 1588 synchronization

  Hello!

  I'm trying to synchronize two PXI chassis with the clocks of 1588. To do this, I use 2 6682 H PXI boards.

  I created a test program that:

  -init on 1588 (init clock, time reference, start the participation in the network of 1588)

  -wait you want to synchronize (only the slave)

  -create the clock in a series, second.

  2 clocks are synchronized (+/-10 ns), but the problem is the phase (ns 0-750). I looked at the clock 2 with a scope and if I don't have severeal times the same program I have a phase error which vary from 0 to 750 ns. The clock frequency is 1.5 MHz.

  I don't understand, normally when I create the clock, both clocks are synchronized, however I have 750 error ns...

  Any idea is welcome...

  Hello.

  There are a number of things I can think of that could cause the behavior like what you see

  The first is that if the clock generation began before the slave had made its setting initial timekeeper to match the master.  It is easy to verify if this is the problem: when you see clocks frequency-locked, but out of phase, can you stop the clock generation and re - start?  Do you see the same offset?  Of course, then stop re-start clock generation, 1588 operation must not be interrupted (use the "Create Clock niSync' and 'niSync clear the clock' live).

  Another thing that could cause this is if the start time for each clock is at the edge of a second different.  Given that the period of a 1.5 MHz clock is such that you do not have a whole number of times less of a second, if you start time 09:00 clk and clk B in time 09:00:01, the clocks will have an offset.  In addition, the PXI-6682 can generate only clocks with periods which are a multiple of single 10ns.  The period of a 1.5 MHz clock is 666.6666... NS.  The driver OR Sync will complete it until 670ns, so the offset of the clocks began at different times can be as high as half of this (335ns).

  I know it does not explain the larger shifts (up to 750ns), that you've seen, but I hope this can help find the problem.

  Kind regards

  Alejandro

• NEITHER 5751 Clk 10 MHz Sync

  Hello

  I'm pretty new to Labview FPGA programming. In my project, I would like to synchronize the ADC of the NI5751 to an external frequency normal provided by the "10 Mhz REF in" SMU-1075 chassis. Is it possible that the sampling frequency of 50 MHz of the NI5751 is driven through the 10 MHz? And in addition, the "PXI Clk10 MHz" that can be included in the base of the FPGA project clock is derived from the "10 Mhz REF in"?

  Thank you.

  Kind regards

  Thomas

  Hi Thomas,

  Yes you´re good it s 3, 3V to the CLKIN to the 5751. Anyway, use the DSTARA approach.

  In the manual of your chassis SMU-10xx, you will find a section called 'timing Slot System.

  in the chapter of the implementation on the road gives you the delivery of the DSTARA into the slots on the frame.

  For example, SMU-1082:

  

  see you soon

  Marco

• Problem with the series of read/write

  Hi all

  I don't know if this belongs here or on one of the guidance material, but I thought I would start here.

  I have two devices which I am currently trying to contact via the serial ports on a PXI chassis in real time.  In both cases, I series of software that seems to work fine when I use the serial port on the controller (for example, COM1).  Now, I have two cards that I used two different systems to talk to these devices - 8430/2 and 8430/4.  In both cases, when I use these cards, it seems I have periodic in response by devices delays when you use the same code that I use when talking through the serial port of the controller (i.e., I get some downtime when trying to read code error-1073807339).  I tried to Exchange cards with spare parts, but I have the same problem.  I can handle the delays to retransmit the command, but this destroys ultimately the determinism of the system given that the delay may create a pause of up to 2 seconds.  I tried to change the size of the buffer, but I seem to have the same problem.  Does anyone have any ideas as to what could happen?

  Cheers, Matt

  Thank you, Luis.  Indeed, one of the errors being thrown was a timeout error (the other was thrown by one of the devices indicating that he did not understand the command sent).  However, the problem wasn't that I was getting a timeout, but rather that I was getting an error on one platform and not on another.  But it seems that I solved my problem - I simply set the I/O VISA Write mode to synchronous and this seemed to solve the problem I had.

  Cheers, Matt

• X 220 and Mini Series 3 with USB 3.0

  Hello

  I am recently received a Mini Series 3 with USB 3.0 for my laptop company ThinkPad X 220 Windows 7 64 bit.

  However, after installation of the USB 3.0 driver downloaded from the Lenovo Web site, I still do not see USB 3.0 in my Device Manager device.

  I have also some test using an USB3.0 external HDD but the USB 3.0 port seems to have exactly the same speed as all the other ports.

  How can I activate USB3.0 on this Docking Station?

  Thank you

  Jeremy

  ThinkPad X 220 with i7 (i3 and i5 has usb 2.0 ports only) has a single USB 3.0 port, but the way it is connected through the motherboard, it is unable to support port additional usb 3.0 from the dock.

• Variables of engine I/O for the NI 9144 scan

  I think replace a cRIO-9074 with a 9144 expansion chassis and want to make sure that the interface I have

  used to access I/O variables programmatically in URL still works with the 9144.  Could someone if possible

  disclose the URL format?

  Mike,

  Here's some URL for example for channels on a 9144 expansion chassis. I used all of the default names for the EtherCAT master controller, chassis, modules and channels.

  CompactRIO Target\EtherCAT Master\Device\Mod1\AI0 \\RT

  CompactRIO Target\EtherCAT Master\Device\Mod2\DIO0 \\RT

  CompactRIO Target\EtherCAT Master\Device2\Mod1\AI0 \\RT

  PXI Target\EtherCAT Master\Device\Mod2\DIO0 \\RT

  Name of the target RT RT CompactRIO target.

  EtherCAT Master - name of the EtherCAT interface on the target of RT

  Device: name of the 9144 chassis

  Mod1 - name of the module

  AI0 - the channel name

  To access the 9144 chassis you must physically connect to a CompactRIO controller with two Ethernet ports or a PXI RT controller with two Ethernet ports.