cRIO-9082 DMA bandwidth between RT and FPGA

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• PXI data transfer between OTN and FPGA

  Hello

  I have a DAQ card in my PXI and a FPGA 7813R map.

  The problem is that I send sample waaveforms of the data acquisition card to the FPGA card (which only has digital i/o) to launch my control on the FPGA. When I generate a sine wave of 50 Hz in the OTR to simulate a measured signal and send it to the FPGA through the controls in the Panel before (http://zone.ni.com/reference/en-XX/help/371599G-01/lvfpgaconcepts/pfi_data_transfer/) the signal happens on the fpga is much slower than 50 Hz indicating this folding is (it takes too much time to send the data). I tried to use this method of data transfer because my control requires only the more recent data, but it also has a phase lock loop that requires the data arriving at least resemble the original signal. Another criterion is that the control to data more up-to-date as possible. I know there is another option of the use of DMA FIFO, but I use it because I thought it would take more time to send the data, because each value must be sent.

  My questions are:

  I go about it the correct way? I know that there is the FPGA cards with analog inputs. I buy one it is because I have a large amount of differential analog inputs (20 +)

  Is there a quick way to transfer data to the FPGA. (I have converted all the FXP data before writing to the FPGA)

  Hi Jagwa,

  You should not have to synchronize the RTOS loop that written information and the FPGA VI which is read.  Instead, you can simply use a FIFO.  In RT, you can write all the data points for the FIFO, and then you can extract them one at a time on the FPGA VI and use them as needed to control functions.  In this way, the only time you need to worry about stopwatch the FPGA VI to get out the data to mimic 50 Hz.

  Kind regards

• DMA between host and target FPGA is not supported for this remote system.

  I try to cover with my FPGA (on the cRIO-9002) of the RTO.  I have install upward of anOpen good VI reference without error, but as soon I try to access thefifo I error-63001 and the attached message wrote:

  Error-63001 occurredat reference FPGA VI opened in the target - multi rate - variables - fileIO_old.vi

  Possible reasons:

  NOR-RIO FPGACommunications framework: (Hex 0xFFFF09E7) DMA from the host to the FPGA targetis not supported for this remote system. Another method for controller of e/s or climatiqueLes associated with the FPGA target.

  What other I/O optionsdo I need to move the data asynchronously to the RTO for the FPGA. I have triedcreating memory, but it seems that I can't write to the memory of the RTOSside.

  We have also a 9012sitting around will using this cRIO rather solve this problem.

  I'm very very greenwhen it comes to LabView, so I apologize if this is an easy question.

  As stated in the readme of the driver NOR-RIO, DMA is not taken in charge from the host to the FPGA on the cRIO-900 x series. The cRIO-901 x supports DMA transfers between host and FPGA and FPGA to host all the cRIO-900 x series controllers only support transfers the FPGA host DMA. As a result, LabVIEW returns an error if you try to transfer using DMA controller for cRIO-900 x.

  The 9012 looks like the ideal solution, you are very lucky to have additional hardware laying around

• Compilation of LabVIEW FPGA on crash RT cRIO 9082

  Hello

  I developed a project of NI VeriStand FPGA (see Project.png) for a target of 9082RT cRIO (which contains 2 cRIO: 9205 & 9264).

  I have develop a piece of software code to run it on the chassis of RT cRIO 9082 because I never used this kind of front frame.

  The problem appears when I tried to compile the FPGA.

  Start the compilation, I see a pop-up (see Msg.bmp) and failed to compile (cf.). Details.bmp).

  With the following error, I'm sure that the failure is not because of my code.

  Can you help me?

  I found the problem that comes from the installation of 2012 more develop.

  When the FPGA module and 13.4 Xilinx tools is installed, the DLL 'LIBBz2.dll' (of the NIFPGA\...\Common\nt\Xilinx record 13.4 "is not copied in the following"C:\Windows\system32"folder.

  After I manually copied this dll to the "system32" folder, I restart labview and the compilation was successful.

  A. Kaszubiak

• NEITHER 9401 + cRIO 9082 speed measurement

  Hello!

  I want to measure a signal rotation with the NI9401 and the cRIO 9082. For the test, I use a signal generator and it is connected to the Mod5/DIO0. In the FPGA, I want to measure the rising edges. (see photo) With them, I'd be able to calculate the number of laps. But my code does not work: counties meter up constantly even I have no signal generator connected. What is the problem?

  Thank you in advance.

  Best regards

  Franz

  Hi Franz.

  I found no examples in LabVIEW version 2013, but in 2012, you can find them. In general, you can simply download the version as an assessment and get examples. Since I found the examples in a VM youc an discovered the examples attached to this post.

  Not to mention that most of the examples are restructuring in the new versions of LabVIEW but general subjects are still there.

  Best regards

  Christoph

• cRIO 9082 - cannot connect through NI MAX/LV

  Hi all

  I am writing my bachelor on the dynamic memory and the vibration tests.

  The project I design an experimental platform used to excite some mechanical components.

  We need several sensors (MON, accelerometers, DC motors etc.), we use a cRIO 9082.

  However, when I want to connect to the cRIO I can't OR Max, that is I can't set it up. I can see it only in the browser OR (see photo).

  I am connected directly to the cRIO via a crossover cable and IPv4 is set to automatically assign the IP address.

  Any ideas of how I properly connect to the cRIO 9082.

  I'm new on the job with this kind of electronic products, since I am majoring in mechanical engineering - so please keep the explanations as simple as possible ;-)

  If you want more details, please let me know.

  Thanks in advance.

  JZaulich.

  Hi Alex,

  Thank you very much for your answer.

  I had to disable the Windows Firewall as well as the AVG firewall, that did the trick.

  Apparently Windows does not allow this type of connection.

  After you turn off the firewall, I added the cRIO using the IP address, and it seems to work very well.

  Thanks again.

  Best regards

  Jakob Zaulich

• SoftMotion and FPGA OR 9514

  Hey Gang,

  I spent the day to set up a new system of cRIO and a new installation of LV2012 RT and FPGA Softmotion.

  Our system uses a CAN interface, which, we learn, requires the use of FPGA mode.  Maybe this isn't a bad thing, because we are concerned about the speed of the scan mode.  I developed an FPGA application before.

  My main concern is right now, to get the job of control of movement stuff.  Our movement is a NI - 9514.  I hope there is a way to use the SoftMotion modules with the FPGA interface. Otherwise, the movement FPGA examples look REALLY discouraging!

  All I do is homing and simple relative motions.  I enjoy all help/advice on the simple/fast way to get there.

  Thank you!

  Roger

  Hi Roger,

  You can use the 9514 without using the "formidable" examples using the cRIO in hybrid mode. There are good instructions on how to do it here. A quick summary, is to put the modules you want to use in scan mode under the chassis and modules you want to use FPGAS in the FPGA. When you compile the FPGA bitfile, RIO scan interface is compiled for modules that are under the chassis so that you can use in scan mode. A few warnings:

  • The FPGA VI must be running to use the 9514. When you are in scan mode, the FPGA runs automatically without requiring you to do so. However, in hybrid mode, the FPGA does when you run it explicitly.
  • The FPGA VI should work for deploy you the settings of the axis of the target. This can be a bit awkward during development when you make changes to the configuration of the axis. Usually, you run the FPGA VI using the open FPGA VI reference in a RT VI. However, when you run a RT VI, it checks to see if the deployed data are compatible with the project data and if not, invite you to deploy. Don't forget, however, that you cannot deploy your FPGA VI because is not yet running (since it won't work until the open FPGA VI reference runs). When you try to deploy, you will get an error (I think it's something like "E/s Module not found"). What I do usually is during development, run the FPGA VI manually (by pressing the run button). You can then run your VI RT which uses the FPGA VI reference and everything will work. You will encounter this problem only if you change the configuration of the axis of the project (and so won't be a problem for your final application when changing your aern can't axis settings). If you change the configuration of the axis programmatically, you do not experience this problem.

  As a note side for those who use the 951 x modules of movement, unless you really need to do something custom, you must use the modules of 951 x in scan mode. The performance is better in scan mode it is using FPGA (assuming you want to use the API SoftMotion high level (EXVIs, blocks of functions or properties/methods)). When you use FPGA mode, there is further delay to obtain the data of the FPGA in the SoftMotion engine. In addition, you are always coupled to the scan engine! If you get the worst performance, a more difficult experience, and you don't even remove the need for the analytical engine. There are valid reasons to use the modules of 951 x on the FPGA (for example custom control loops), but most applications I've seen use FPGA would be better served by using the module in scan mode.

  Thank you

• OS cRIO-9082

  Hello

  This question is too generic. What to know exactly?

  cRIO-9081, 9082 high performance controller + chassi and can be used with WES7 (not in real time) or LV Real - Time OS.  The material can be used with any of these options (not both at the same time) depending on what type of application you are think.

  http://sine.NI.com/NIPs/CDs/view/p/lang/en/NID/210000

  

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