Removal handle NI-SMU-1075

Similar Questions

• PXI-4070 appearing does not in the locations of SMU-1075 16 & 17

  Hello

  I have an SMU-1075 with the help of a remote SMU-8370/PCIe-8371, 4 SMU-6363, SMU 8-2351 and PXI-4 4070 s. The PXI - 4070 s are required to be plugged into hybrid slots (2-5 or 15-18). To maximize throughput, the 4070 s are plugged into connectors 4 and 5 and the other 2 are plugged into the 16 & 17 slots so that the DMM is divided to the use of 2 different PCI to PCI bridges. The issue I see is that the 4070 s 2 plugged into slots 16 & 17 are not displayed in NI MAX and in the Device Manager, display an error (see photos). I can see and use all other modules in the chassis, including the other 4070 s 2.

  I have 3 other machines running in production with a configuration almost identical, the only difference is that the other machines use a PCIe-8372(or maybe an old model of the PCIe-8371?) The main difference is that the cards in the older machines have 2 ports but the model # is not projected on the cards so 8372 is a guess based on the installation booklets) host controller. The PCs are identical in all 4 machines: industrial Advantech, WinXP sp3, Intel core 2 Quad, 2 GB of RAM.

  If I remove the PCIe-8372 among the machines to work and install it in the machine, with that I have problems, I can see and use all of the 4070 s so that we know that the PXI chassis and 4070 s are very good. I also tried all sorts of versions of different drivers and drivers uninstalled/re-installed several times as well as the solution provided in this post of 2011: http://forums.ni.com/t5/PXI/PXI-4070-DMM-in-PXIe-1075-Chassis-not-found/m-p/1609804/highlight/true#M...

  I was wondering if anyone else has had problems similar to this?

  OR Support Reference #: 2292623

  It's a strange problem.  If anything, from the 2 to the guest card guest card 1 port should help.  A few things...

  Have you tried the 4070 s 2 Slots 16 and 17 of the 15 to 18 slots?  One of the effects of different host maps is a different interrupt for some legacy interrupts swizzling, and their displacement that will put them on the other 2 lines.  It seems unlikely that the problem.

  Another long shot based on the differences between the PCIe-8372 and PCIe-8371: try to remove one of the panels of the SMU of the system.  Reason: PCIe-8371 requires little storage space.  If we put a needle with how the PC will provide then reduce the requirement will bring the use of net memory to 0 (PCIe-8371 ask 1 MB, which is the minimum no no one can ask any card PCIe/SMU).

  Have you tried the software of BIOS compatibility and the switch on the PCIe-8371?  http://www.NI.com/download/MXI-Express-BIOS-compatibility-software-1.5/3764/en/

  -Robert

• PXI-5154 making fried SMU-1075

  So, I just tried to install a PXI-5154 in SMU-1075 chassis.  I followed the instructions that came with the card, but after turning on the chassis, there is no wizard detection of material, and no LED light came.  I was going to try it in a different location, but when I slipped the card out of the chassis, I saw that looked burnt decision-making (see attached image).  I'm not sure that I was wrong, and now I'm worried I might have damaged some of the other cards that have been installed in the chassis.  So my question is double: 1) an idea of what went wrong here? 2.) nothing to say if the chassis itself is somewhat damaged? (3.) if the damage has not been caused by some error on my part of the user, is there an any warranty / replacement of the card?

  

  Thank you

  Well, turns out the instructions that came with the card were bad... the instructions say plug the card into a slot chassis marked with a number of cicrled, turns out I needed to plug the card into a slot with a number of cirled with a small 'H' beside him. Everything seems to be working fine now, thanks zeus

• MAX can't see my SMU-5122

  Hello

  I am currently in a period of training, and I try to install a banch instrumentation for my tutor.

  So I have a SMU-1075 chassis, which is connected to my computer by an SMU-8370.

  There are 3 modules:

  PXI-4071

  PXI-5422

  SMU-5122

  For the first two I have no problem to see at MAX. But the last of them does not appear in MAX?

  I installed LabView 2010, also NEITHER Scope and provides many other software with my products.

  Can someone help me? =)

  Hi Thibloiz,

  What version of NOR-Scope? You should be able to get the version # in the list of software in MAX.

  Have you tried the 5122 in other locations of your chassis? It shows in the Windows Device Manager?

• ERROR-235140 SMU-4139 self-test

  Hello

  I get an error with my SMU-4139 module. I have a chassis SMU-1075 configured with 2 NI PXI-4070, NI SMU-4139 2 modules and 3 NI PXI-4130 modules.

  When I start my computer, a SMU-4139 module lights up with green and active green access light. The other SMU-4139 module will turn - on the same path, but in a short time, access turns off the light and the light turns red. I tried to run the automatic test NI Max, but I get this message.

  The test failed.
  -235140
  Internal hardware error occurred in Power_Supply material. Please contact the support of National Instruments.

  I tried to change its slot SMU, but I got the same error. Should I send this card in Checkout?

  Thanks a bunch!

  Hey,.

  I wanted to give an update about it. I uninstalled OR-DCPower (I think I got the version installed 1.9) and installed NOR-DCPower version 14.1. Everything works very well.

• SMU system controlled by PC

  Hi all

  I have to do a test system optimal hardware configuration OR for an application where the system should simulate Serial interfaces, interfaces to MIL STD 1553 and analog, Digital O/Ps & I / PS. Modules OR for the best match for this requirement were NI PXIe4322, 4300, 6363, PXI-6624, 8430/4,8431/8, Pickering two rtd PXI cards and a card of 1553 PXI SMU-1075 controller SMU 8840-frame. BUT this current price of configurations will on budget than we expected. for this reason I think to change this part and part PCI system in 6363,6634 tax SMU system, serial interface cards and card MIL 1553 with a PCI/PCIe platform and keep the rest of the map with the SMU platform chassis and eliminating controller SMU 8840. So can I use MXIe controllers to implement this system of type test so that I can put all the pci cards in a high-end modules SMU and PC and industrial PXI chassis SMU (1065/1075/1078 one)? If so please guide me what controller MXIe to choose and what would be the compatibility problems that may occur with this type of system in the future.

  Thank you

  My experience with USB has been nothing else to headaches.  So I wouldn't go the route of USB.  Normal PXI slots can also accept the cPCI, so you could look for those as well.  If you just need a very simple map of 1553, I'd go with 1553 Excalibur cPCI card.  I used their cards and they work fine.  Drivers LabVIEW need a cleaning, but they can be used.  This card is a simple send and receive, so if you need to do some testing of weird signal integrety (I don't remember the number of test at the top of my head), this card will not work for you.  But this card was sever thousand dollars less expensive than the GOAL cards, I also used.

• SMU FlexRIO DMA FIFO host read the FIFO overflows broadband bandwidth/DMA issues

  I'm working on an application that uses 2 modules FlexRIO, and 2 LVDS digital I/O adapters.  I'm driving each of the SDC A/SDC B ports on LVDS 16-bit data at 50 MHz adapters.  The FlexRIOs are expected to receive the data and write down them on four targets-to-host DMA FIFO (one per connector SDC), or two by FlexRIO.  The host reads the FIFO and brings together a series of tables each FIFO output 2D.  Ultimately, the individual tables (we're each a quarter of single image) will be assembled in simple images, but I haven't gotten that far yet.

  The duty cycle for the data is about 80% (in other words, I'm only transmit data to the FlexRIOs 80% of the time, the rest of the time the transmitters are disabled), so the flow is about 80 Mbytes/sec/port total invasion, or 320 MB/s on the four FIFOs DMA.  I find that the acquired data gaps sometimes inside that line up along the length of the material part of the DMA FIFO in FlexRIO modules.  In other words, if my memory FIFO DMA are set to 65535 length, I'll see a break in the data acquired at the word of data 65536th.  Data is a waveform of sight, which is essentially just a counter, so it's easy to see the break in the model.  For the words of first 65535, adjoins the data, then from Word 65536 model is discontinuous and starts counting again from there, contiguously.  At the beginning of the acquisition, the FIFO is erased: the beginning data read from the FIFO is always aligned correctly, so I know that the process starts at a good point.

  The error is not always the case: sometimes I get continuous data through the point 65536.  In addition, the error occurs independently between the four FIFO: on a particular race, a FIFO could have data of interest and some bad.  Rarely, all four FIFOs have good data.

  The fact that the gap of the configuration is to the point even the depth of the FIFO DMA tells me that fills the FlexRIO FIFO, the FPGA hardware without the system managing to move to read, which means that the data gets dropped during the period that the FIFO is full.  Then transfer to the host comes into action, there again is the space in the FIFO, and the data is once more contiguous in FIFO memory for a large amount of data (I have not yet tried to locate a second gap in the data of a single acquisition).  It seems therefore that the host doesn't have enough bandwidth between the FlexRIOs and the host of RAM to prevent the filling FIFO, or comes along some software process on the host that is temporarily stop the ability to instantly transfer.

  Are at - it a specification for the SMU flow system that would indicate that we are trying to use too much bandwidth?  Or are there priority controls on DMA FIFO that would allow us to raise the priority of the FIFO transfers as they are guaranteed to go in preference to other system tasks?

  System Specs:

  SMU-1075 chassis

  SMU-8135 CPU

  2 SMU-7962R FlexRIO modules

  2 digital i/o modules of NOR-6585

  LabView 2012 32-bit SP1 version 12.0.1

  A suggestion of an applications engineer of NOR and some experimentation has solved the problem. It turns out that I was calling the method FIFO of DMA stop just before the outbreak of the transmission of the data via a control for the FPGA FPGA VI. I did this in order to clear the FIFO before you begin data acquisition, but I didn't know that this method disables also transfer data between the memory FlexRIO and host. Following this call, I trigger the FPGA code to start filling its FIFO and then begin reading. Calling the Read of FIFO of DMA apparently light up the transfer back, but it seems that the host VI has been randomly slow down enough to move to the bed such as filling the side FlexRIO FIFO and dat would be lost. I changed the host VI to insert a FIFO method call start before the trigger for the FPGA signal, and the problem is now gone.

• How to operate continuously the ' frequency with digitizer step-down converter external vi "?

  Hello

  I use SMU-5663 on SMU-1075 chassis. My goal is to use "step-down with digitizer external .vi" in order to run the SMU-6901 frequency continuous step-down converter. To do this, I added a while loop to the provided sample (see file attachment). The problem is that the while loop does not change; the program stops as soon as its launch.
  Is there anyone who can help me with this you problem?

  Hello

  The 'get frequency response' VI aims to help correct the answer of the step-down in the acquired data. The response of the step-down changes only with frequency and reference level. In your VI, you are in a loop when you call 'Get frequency response' but do not change the frequency or level baseline for the release of the VI will not change.

  To use the external digitizer, you want to adjust the center frequency and level in DAMA reference, read the frequency response and frequency step-down converter win in DAMA, to acquire data starting from the external digitizer and correct using the frequency response of the step-down, and win. You can loop through the acquisition and treatment portions until you change the central frequency or reference level.

• Synchronization of VST: Ok with RFSG, problem with DAMA

  Hi all

  We strive to synchronize 2 VSTs (5644) with DAMA OR and NI RFSG.

  So far, we have been able to sync the RF Transmission of the VST 2 with RFSG, down a less than 100ps difference. It's excellent!

  But we have not been able to renew this success with DAMA: we have time differences in the order of between 2 VST 100us.

  We believe that we follow all the indications of the documentation of DAMA, as shown here:
  http://zone.NI.com/reference/en-XX/help/372058N-01/vstdevices/5644_rfsa_gsynchronizing_clock_signals...
  We ensure same buffers are empty at the beginning of the acquisition by manually empty the VST buffer before calling RFSAInitiate.

  NOTES:

  Our application is coded in C++ only.

  We do not and cannot share the LOs between 2 VSTs, as we Rx/Tx at different frequencies.

  Does anyone have an idea of what we could try?
  We attached the sign of e/s OR our acquisition. Please, let us know if you see something wrong.

  We use DAMA 14.5
  SMU-8135 controller, Win7 x 64
  SMU-1075 chassis.
  SMU-5644R in the location #2 and #6

  Best regards
  Serge

  Hi all

  Finally, support (Kevin Sooch) helped us to solve the problem:

• Veristand reflective memory installation

  Hello

  I have a sytem with 2 chassis SMU-1075 each it's own controller SMU-8133 along with several analog and digital i/o modules. There is also a reflective memory network adapters installed using 2 GE Fanuc pmc-5565PIORC memory - one in each frame. I use NI Veristand 2011 and currently I display the State channels read later number of rings for both controllers and they all have two incrementing as long that the SDF is deployed. According to a white paper OR on distributed systems, there should be no settlement on these channels. There are a few configuration pages in Veristand (reflecting Configuration of the memory and reflective memory Network Configuration) with little explanation of the parameters or how they affect the performance of the RM network.

  Is it possible to get information on how to properly set them up?

  Thank you

  
  

• error 1136 When adding FPGA in SysDef

  I have a PXI-7854R multifunction RIO installed in my SMU-1075 chassis. When I add it to the system under the FPGA node definition file, the RIO node is created with all its subnodes - as expected - but the attached dialog pop error. Whenever I highlight the node newly created Rio the same error appears. Everyone knows this?

  I have an SMU - 6341 Multifunction DAQ designated as master hardware device Synch on the Bus 2 and moved to PXI_Trig0 through all three bus.

  Also, I use Veristand 2011 SP1.

  Thank you

  Yes we have seen. Fortunately, it's just aesthetic. This happens when you have a DAQ master that is hidden in the tree and click devices FPGA. We hope to solve this problem in 2012. Sorry for the inconvenience

• SATA: ERROR: giving up on the I/O transfer [0 x 35] 0

  Wrote the code to perform a very simple text on the same file over and over again write on a loop of 10 seconds approximately.  The code was written using all the tools of stock.  The above error msg would appear and continue to occur at each attempt to write.  The drive has been formatted by using the format datalight reliance system.  Chassis: SMU 1075, controller: SMU-8133.  Tried a new contoller and the hard drive with the same results.

  Reformatted the HD in FAT32 and the problem disappeared.

  The code opens and saves in the same file each time.  A run that same code on frame: PXI-1044, controller: PXI-8110 with reliance as fast as 1ms without any problem.

  The code is a while loop with write in text file with encoded text hard and hard-coded file location with wait 10 sec.  The code will run for several loops and the error happen to apparently randon times.

  I restarted the report this morning after tests were completed and the report came back different from the previous.  The report today is the FAT that is consistent with what we have formatted days ago.

• NEITHER 5751 Clk 10 MHz Sync

  Hello

  I'm pretty new to Labview FPGA programming. In my project, I would like to synchronize the ADC of the NI5751 to an external frequency normal provided by the "10 Mhz REF in" SMU-1075 chassis. Is it possible that the sampling frequency of 50 MHz of the NI5751 is driven through the 10 MHz? And in addition, the "PXI Clk10 MHz" that can be included in the base of the FPGA project clock is derived from the "10 Mhz REF in"?

  Thank you.

  Kind regards

  Thomas

  Hi Thomas,

  Yes you´re good it s 3, 3V to the CLKIN to the 5751. Anyway, use the DSTARA approach.

  In the manual of your chassis SMU-10xx, you will find a section called 'timing Slot System.

  in the chapter of the implementation on the road gives you the delivery of the DSTARA into the slots on the frame.

  For example, SMU-1082:

  

  see you soon

  Marco

• PXI chassis with remote hot-plug

  Hello

  I use the SMU-PCIe8371 with SMU-8370 remote control instruments in the SMU-1075 chassis in Vista. In order to see my instruments in MAX the chassis must be turned on when I reboot Windows. If I disable the chassis while Windows is running, I have to restart to be able to reuse the instruments.

  Is it possible to make MAX see the chassis if it was not executed when Windows started or has been disabled while Windows is running?

  Thank you!

  Hello

  You can disable and enable the bridge PCI to PCI in the Device Manager, but this is not recommended or supported. I also suggest that you turn off the chassis while Windows is running, which is essentially the same as the withdrawal of a card PCI of your computer while the PC is on. This can lead to problems with your system, such as the database of MAX, which isn't very fun to solve. The recommended method to start your system is always chassis first, followed by the PC, and to stop, is PC first, followed by the chassis.

• Workstation PC with full PCI (ie. 256) buses numbering?

  Hello!

  I have a problem with DELL Optiplex 7010 and two bodies SMU connected to it like this:

  Port of PC PCie8372 1-3 metres of cable-> SMU - 8370 >-> the 1 SMU-1065 chassis

  port 2-> 3 metres of cable-> SMU - 8370-> the 2 SMU-1075 chassis

  Problem is that in Windows nipxirfk event log service complained that "PCI Host Bridge: bus Maximum number limit reached before listing all devices, status =-313563 '.

  When I tried different things to solve the problem as withdrawal PCI GPIB bus and change SMU bodies on different ports on PCIe card, half of PC USB ports have stopped working and when I changed something the other half stops working

  PC has limited the availability of bus numbers:

  8< -="" -="" -="" -="" -="" -="" -="">

  = Detection of resources OR root Bus utility =.
  This utility determines the number of root PCI/PCI Express bus
  devices on your system and if there is any number of bus
  range limitations that could cause equipment problems.

  = SUMMARY =.
  Bus single root detected.
  Your system has a single root PCI bus.
  Bus root has a limited scope.
  The BIOS of your system has a limit on the number of bus range
  You can assign to your PCI tree. In Windows XP, this limit is ignored
  and has no effect. In Windows Vista and later versions, the limit is strictly
  applied and cannot be exceeded. Thus, the amount of MXI-Express
  You can reach the material is limited. Refer to the number of bus range
  below the limits of your system.

  = DETAILS =.

  -Root Bus: ACPI\PNP0A08\0 -.
  Bus numbers range: [0, 3]
  Status: Device is running

  This utility ran without error.

  8< -="" -="" -="" -="" -="" -="" -="">

  So I take is not enough PCI bus available on this PC to allocate sufficient resources for all connected devices. There is nothing BIO on bus PCI PC I could delete or nothing to what I could turn off, actually, I have to back PCI GPIB card and who will eat resources. The two bodies SMU are about half full of instruments and I need to add more than a few cards to one of them. PC BIOS is up to date. I was sort of the details with the support OR already, but they do not have solution. Our laboratory has two former HP/workstations DELL (is no longer available) with the limited numbering PCI bus that work with the same two bodies very well. I think that this problem is PC related BIOS and my computer is right on the limit of not working.

  Basically, I need to know a few current PC workstation, used successfully to control at least two 2 SMU bodies. If you could check you workstation PCI bus numbering capacity with this tool EITHER:

  http://digital.NI.com/public.nsf/allkb/BF84B75E08D2A7708625763B00670007?OpenDocument

  And display the results here, I would be very grateful.

  Jan,

  Some Dell BIOS have an option to set the number PCIe bus max.  A lower number allows more usable in a 32-bit operating system memory.  I saw him in some positions as the T3600 precision work.  On these machines, you access the BIOS and go to system Configurationoption"Configuration of the PCI Bus, and then change the value to something higher (such as 256).  Can you check for this option?

  -Robert