instruction evaluation order box

Hello

This is a pretty basic question, but I couldn't find a clear answer to this.  We have a following code:

Many people feared that there is a race condition between the definition of the State of the RTS and DTR in the diagram.  When I start debugging the code, the RTS State seems to be first as the case statement is not evaluated until the State of the RTS's setting.  A guy pointed out that debugging code does not faithfully represent the order of execution of the code and therefore cannot be used to determine whether or not it's a race condition.

In fact, I hung the material up to a Logic Analyzer and ran the 1,000 cycles, and each single cycle seems to have state first put RTS, which seems consistent with what the debugger.

My question is: can I do trust the code debugger step by step?   In addition, LabView is assesses the case statement with objects outside the case statement?

Any clarification would be greatly appreciated.

Thank you

Patrick

Hello Patrick,.

Your colleague is correct - the image you posted shows a potential race condition.  Do not forget that execution highlighting discussions single execution of your diagram of block and only one thing can happen at the same time, so it does not faithfully represent the execution of parallel processes.

The good news is that the solution is simple - simply to introduce a dependency of flow that forces the execution order.  Connecting wires instrument and/or error after you set the RTS of State rather than forward seems like he would do what you want.

Kind regards

Tags: NI Software

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